Rectifier Schematic
Ryan Boyd
EECE 690/890, Digital Radio Design
Kansas State University
Spring 1999
The master-slave filter/oscillator setup requires an amplitude detector. It senses the level of the oscillator output and provides a DC voltage proportional to that output. This voltage is used in the feedback loop that controls the master-slave system. The system operates by having a filter and oscillator that are matched in all respects except for the center frequency. The oscillator frequency is set above the filter frequency. When the oscillator output reaches a certain amplitude, the feedback signal stops increasing the Q factor of the filter and oscillator. This prevents the Q of the filter from becoming so high that the filter oscillates.
The filter/oscillator for our setup also needs digitally selectable center frequencies, to meet the Bluetooth specifications for frequency hopping. This digital frequency control is implemented with capacitors and FET switches.
The amplitude detector is shown in red on the block diagram above. The frequency select line is shown in green.
Rectifier Schematic
This figure shows the core circuit schematic of the amplitude detector. It is a Gilbert cell mixer with its two differential input pairs tied together. This makes it act as a rectifier. Transistors M1-M4 act as switches in this configuration, and transistors M5 and M6 act as a differential pair. Transistors M1 and M3 turn on when the positive input has higher polarity than the negative input. The reverse is true for M2 and M4. Ideally, these transistors are perfect switches, either a short or open circuit at all times. In this ideal case, M5 and M6 act as a differential amplifier, with the polarity of the output reversing each time the polarity of the input changes. This produces a linear rectification of the input signal.
Of course, no transistor is an ideal switch. In order to design M1-M4 to act as nearly ideal as possible, we must consider the transconductance of the FETs, their input capacitance, and the overdrive voltage we will have on their gates. The overdrive voltage ("delta V") is the difference between the applied gate-to-source voltage and the threshold of the FET. In this circuit, when the gate voltage on one FET of a pair (M1, for example) rises by delta V above its bias, the other FET (M2) will have its gate voltage drop by delta V. This means that M2's gate-to-source voltage is below the threshold, and M2 is completely "off". All current in M5's side of the differential amp will flow through M1.
We can see that as delta V shrinks, M1-M4 act more nearly as ideal switches, and our amplitude detector will be more linear. Making delta V small implies making the FET transconductance large. However, large transconductance introduces a new problem: input capacitance. As a FET is made larger, its capacitance increases, and it attenuates the input signal before any rectification is performed. The task now is to find the best balance between low delta V and low input capacitance. Experimentation and simulation showed a size of 1.2u/0.5u for M1-M4 to be a good balance.
Transistors M5 and M6 were made small to limit the effect of input capacitance. Resistors R1 and R2 were chosen to make biasing easier, and to set the gain of the differential amplifier to a reasonable value. Capacitor C5 acts as a low-pass filter, averaging the rectified signal.
Resistors R3-R6 are for biasing, and transistor M7 acts as a current source. Voltages Vbias1 and Vbias2 are generated by stacking diode-connected FETs, and the current source is part of a current mirror not shown here.
Stages following the Gilbert cell are fairly well-known circuit configurations, and will not be described in detail. Transistors M8 and M9 act as level-shifting buffers, to bias the signal for the differential-to-single-ended converter formed by M12-M15. This converter generates a current output, which is converted to a voltage with a current mirror formed by M16 and M17 and resistor R7.
Differential-to-Single-Ended Converter
The digital frequency selection uses the circuit above. At first glance, it would appear that we can consider the FET as a simple switch, adding capacitance to the tuned circuit when it is "on". However, the FET has gate capacitance, and we find that it is not negligible for this circuit. We want to make 16 MHz steps in frequency. With the inductance value used in the oscillator, and at our center frequency of about 2.4 GHz, this translates to about 5 fF of capacitance to be switched in or out for each step. This is on the same order of magnitude as the gate capacitance per square.
In order to switch in the actual amount of capacitance we want, we need to find the difference between the capacitor itself (the "on" capacitance) and the series combination of the capacitor and the gate-to-drain capacitance of the FET (the "off" capacitance). We make this difference equal to the 5 fF we wish to switch in.
A second consideration here is the Q factor degradation associated with switching in capacitors. The FET will have some equivalent resistance when it is turned on, which appears as a parallel resistance across the tuned circuit. However, this resistance is multiplied by approximately Q squared in the series-to-parallel conversion, and it is then much larger than the equivalent resistance appearing across the tuned circuit from other sources. Therefore, the difference between "on" and "off" capacitances is the overriding consideration.
The final tuned circuit was implemented by Aaron Orsborn as part of the master/slave filter/oscillator circuit. Final part values should appear on that page.
0.25 V output
1 V output
2 V output
The circuit was designed so that the output, in DC volts, would approximately equal the input, in peak-to-peak differential volts. A 0.25 Vppd signal is slightly too small for this to be true, as a result of the balancing act between input capacitance and output linearity mentioned above. Also, the circuit saturates for large voltages, as can be seen in the 2 V output plot. Nonetheless, the circuit does give a decent indication of input amplitude.
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