EECE 696 Class Home Page
This site was developed as part of an introductory course in VLSI design conducted at Kansas State University in the Fall 1999 Semester. The course project involved a team-oriented design of a substantial mixed-signal chip, the KSU696 Monolithic Stereo FM Transmitter IC.
The KSU696 IC, shown below in block diagram form, includes most of the circuits needed to create a stable, frequency synthesized stereo FM signal within the FM broadcast band (87.9 to 107.9 MHz). It is designed as a next-generation replacement for ICs like the popular BA1404. Compared to the BA1404, the new design provides higher levels of integration and offers the following advanced features:
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Detailed Design Information
If you click on the links below, you will find details on the design of the KSU696 including schematics, layouts, and simulation results produced by the students in the class.
Two versions of the design were developed by two competing "companies"
during the course, with 7 students in each company. Each company
was broken down into teams to develop the digital, analog, RF, and test
circuits of the chip. Information on the circuits created by each company
and student are accessible through the following links:
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Information on the course itself, including course syllabus and project
assignments can be found here.
Fabrication, Testing
Our design is currently a prototype designed in AMI's ABN 1.5um CMOS process using MOSIS scalable design rules at Lambda=0.6u. It contains all essential elements needed to transmit legal-limit power signals, and the design was simulated over all process corners and over temperature to assure a fully manufacturable part.
The chip was fabricated through MOSIS and tested during the Summer of 2000 by Matt Peterson, with help from additional members of the project team. Test reports on the chips were written by Matt Peterson and Shobak Kythakyapuzha.
Test report on company Alpha's chip
Test report on company Beta's chip
Future Enhancements
Planned upgrades include introduction of an image reject mixer to prevent dual-channel emissions (the current design transmits at both 300 kHz above and below the frequency of the on-chip PLL controlled oscillator), correction of problems encounted in the initial design, and movement of all components on-chip (currently preemphasis networks, an RC loop filter, and a transmit harmonic filter must be provided externally). Matt Peterson has taken up this work and prepared designs for these elements as part of an independent study course during the summer of 2000. For details on these designs, see the document below: