Serial to Parallel Converter

Serial to Parallel Converter:

Description and Functionality:

The serial to parallel converter is simply a 10-bit shift register will a single input and 10 parallel outputs. These outputs are fed directly into the divide-by-N counter that Andrew put together. The 10 bits are used to program the divide-by-N counter by effectively telling it what value to count up to.

Important Note:

Andrew put an additional flip flop on the output of the divide-by-N counter. This extra flip flop forces the output to have a 50% duty cycle. However, this means that the data programmed into this shift register must be half of what divide factor is actually desired. In other words to get divide-by-160 we would have to program in 80.

A standard static flip flop was used to this part of the design. The static flip flop is slightly larger in layout, but can be clocked much slower and still retain its programmed bits. Each flip flop contains an asynchronous clear line. This clear is only used when the chip is to be externally reset. The !Q output is not desired so it is not routed out of the layout.