EECE

631

MICROCOMPUTER SYSTEM DESIGN

SUPPLEMENTAL COURSE MANUAL

Donald H. Lenhert

Fall 2001

Department of Electrical and Computer Engineering

KANSAS STATE UNIVERSITY

Manhattan, Kansas 66506

Printed August 20, 2001 at 5:44PM

ACKNOWLEDGMENTS ii

DISCLAIMER ii

COURSE DESCRIPTION Page 1

CATALOG DATA Page 1

PREREQUISITES BY TOPIC Page 1

TEXTBOOKS: Page 1

REFERENCES: Page 1

COURSE OBJECTIVES Page 1

TOPICS Page 2

COMPUTER USAGE Page 2

LABORATORY PROJECTS Page 2

COURSE REQUIREMENTS Page 2

HOUR EXAMS AND FINAL EXAM Page 2

SHORT QUIZZES Page 2

HOMEWORK Page 2

Problem assignments Page 2

Laboratory Assignments Page 3

Computer Assignments Page 3

Oral Presentation Page 3

PROJECT Page 3

APPROXIMATE GRADING Page 4

FORMAL LAB REPORT Page 4

GUIDELINES FOR 10 MINUTE ORAL PRESENTATIONS Page 5

PROJECT PROPOSAL Page 5

REFERENCES OR BIBLIOGRAPHY Page 5

OPERATOR'S OR USER'S MANUAL Page 5

PROJECT REPORT FORMAT Page 6

SAMPLE MICROPROCESSOR PROJECT REPORT EVALUATION Page 7

COMPUTER INFORMATION Page 8

MICROPROCESSOR LAB COMPUTER USERS' GUIDE Page 8

LAB HARDWARE CONFIGURATION Page 8

FORMATTING A FLOPPY DISK Page 8

PRINTING A LISTING FILE Page 8

USING THE TERMINAL EMULATOR PROGRAM - KERMIT Page 8

DOWNLOADING OBJECT FILES TO THE MC68332 BOARD Page 9

UPLOADING A FILE FROM THE MC68332 TO THE COMPUTER Page 9

LABORATORY INFORMATION Page 9

LABORATORY POLICY Page 9

MICROPROCESSOR LABORATORY KEY POLICY Page 10

OPEN HOUSE RULES AND REGULATIONS Page 11

M68332EVK EVALUATION KIT INFORMATION Page 11

MC68332 Chip Selects Page 11

MC68332EVK PORT USAGE Page 12

MC68332 EVK Memory Map Page 12

LABORATORY EXPERIMENTS Page 13

MICROCOMPUTER LAB 1: 68332 Monitor Familiarization Page 13

CPU32BUG System Calls Page 21

CPU32Diag DIAGNOSTIC FIRMWARE Page 22

MICROCOMPUTER LAB 2: 68332 Debugger Familiarization Page 22

MICROCOMPUTER LAB 3: Assembly Programming Lab Page 24

MICROCOMPUTER LAB 4: C Compiler Lab Page 25

MICROCOMPUTER LAB 5: MC68332 C Programming Lab 1 Page 26

MICROCOMPUTER LAB 6: MC68332 C Programming Lab 2 Page 27

MICROCOMPUTER LAB 7: Testing Lab Page 28

TESTING MICROCOMPUTER SYSTEMS Page 28

LOGIC ANALYZER - Agilent HP1671G Page 28

LOGIC PROBE Page 28

INTEGRATED CIRCUIT TESTER Page 29

LOGIC ANALYZER - Agilent (HP)1671G Page 29

MIXED SIGNAL OSCILLOSCOPE - HP 54621D ($5K) Page 29

MIXED SIGNAL OSCILLOSCOPE - HP 54621D Page 30

MICROCOMPUTER LAB 8: MC68332 Digital I/O Page 30

MICROCOMPUTER LAB 9 Analog-to-Digital and Digital-to-Analog Page 31

MICROCOMPUTER LAB 10: MC68332 TPU Lab Page 32

MC68332 SOFTWARE INFORMATION Page 35

COMPARISON OF THE MC68332 AND MC68HC11 INSTRUCTION SETS Page 35

Assemblers Page 37

C Compilers for EECE631 Microcomputer System Design Page 39

CC68K Page 39

C68332 Page 39

GCC Page 39

C68332 Compiler Options Page 41

GCC 68332 C Compiler Options Page 43

GENERAL TIMING INFORMATION Page 44

Timing Block Diagram Page 44

GENERAL ANALYSIS PROCEDURE Page 45

COMMON TIMING CONSTRUCTION Page 46

Write-only Timings Page 47

Read-only Timings Page 51

MC68332-KM62256C TIMING EQUATIONS Page 54

MEMORY Page 57

EPROM Page 57

KM62256C Memory Data Sheets Page 58

Data Sheets Page 66

MC 144110 Digital-to-Analog Converter with Serial Interface Page 66

MC145051 11 Channel A/D Converter Page 70

74HC594 8-bit Shift Register with Output Registers Page 76

74HC166 Parallel-Load 8-bit Shift Register Page 79

Add-on Board Schematics Page 82

MC68332 EVK Expansion Connector Pin Assignments Page 82

Shift Register Digital I/O board Page 83

Analog-to-Digital Board Schematic Page 84

The authors would like to acknowledge the generosity of Motorola Semiconductor Group for their support of our class. They have supplied the microprocessor board used in the lab at reduced cost and donated the manuals handed out in class. In addition we would like to acknowledge the assistance of the graduate student instructors and former students in attempting to make this reference manual more complete and understandable.

Information contained within this document is current as of the date of printing. All information contained herein is subject to revision. If significant revisions are necessary, the instructors will attempt to make these known. It is the student's responsibility to keep abreast of any changes which affect use of the equipment or affect their grade. Changes will be announced in class, in lab and/or on the web at www.eece.ksu.edu/~lenhert/631/631.html

CATALOG DATA: EECE 631. Microcomputer Systems Design. (3) I,II. Design and engineering application of 16 and 32 bit microcomputers to instrumentation and control. Timing and other interfacing problems will be covered. Two hours rec. and three hours lab a week. Pr.:CIS 208 or CIS 209 and ((EECE 525, EECE 431, EECE 501) or MNE 535)

PREREQUISITES BY TOPIC:

Prerequisites are waived for graduate students since they are expected to have the maturity to determine their own ability to handle this material.

1. Use of number systems and two's complement arithmetic

2. Use of typical logic gates (AND, OR, Flip Flops)

3. Assembly language programming for 8 bit microcontrollers and their peripherals

4. Use of flowcharting or pseudocode, program design, implementation and documentation for assembly and C language

5. Operation of digital logic, operational amplifiers, and simple BJT circuits

TEXTBOOKS: 1) Thomas L. Harmon, The Motorola MC68332 Microcontroller; Product Design, Assembly Language and Interfacing, Prentice Hall, Englewood Cliffs, NJ 07632, 1991.

2) Donald H. Lenhert, Microcomputer Systems Design Supplemental Course Manual, EECE Dept., Kansas State Univ., Manhattan, KS, Fall 2001.

TEXTBOOKS SUPPLIED 3) M68332 User's Manual, MC68332UM/AD REV 1, Motorola Semiconductor Products Inc., Phoenix, AZ, 1995.(http://e-www.motorola.com/brdata/PDFDB/docs/MC68332UM.pdf)

• BY MOTOROLA SIM System Integration Module Reference Manual, SIMRM/AD, Motorola Semiconductor Products Inc., Phoenix, AZ, 1991. (http://e-www.motorola.com/brdata/PDFDB/docs/SIMRM.pdf)

5) QSM Queued Serial Module Reference Manual, QSMRM/AD, Motorola Semiconductor Products Inc., Phoenix, AZ, 1991.

(http://e-www.motorola.com/brdata/PDFDB/docs/QSMRM.pdf)

6) CPU32 Central Processor Unit Reference Manual, CPU32RM/AD Rev. 1, Motorola Semiconductor Products Inc., Phoenix, AZ, 1996. (http://e-www.motorola.com/brdata/PDFDB/docs/CPU32RM.pdf)

7) TPU Time Processor Unit Reference Manual, TPURM/AD Rev. 3, Motorola Semiconductor Products Inc., Phoenix, AZ, 1996. (http://e-www.motorola.com/brdata/PDFDB/docs/TPURM.pdf)

HANDOUT 8) Donald H. Lenhert, Microcomputer Systems Design Syllabus, EECE Dept., Kansas State Univ., Manhattan, KS, Current edition.

RECOMMENCED: 9) Ted Van Sickle, Programming Microcontrollers in C, HighText Publications, Inc. Eagle Rock, VA 24085.

OR 10) Michael Barr, Programming Embedded Systems in C and C++ O'Reilly and Associates, Inc., Sebastopol, CA 95472.

REFERENCES: References are on the 631Webpage at http://www.eece.ksu.edu/~lenhert/ 631/ref.html

COURSE OBJECTIVES: The major course objective is that a student should be able, on completion of the course, to program in C and/or assembly language, interface and apply to a 'real' problem a typical embedded microprocessor making appropriate hardware and software trade-off.

Academic Accommodations for Disabled Students: If you have any physical or learning disability which will make it difficult for you to carry out the work as I have outlined in this syllabus or which will require academic accommodations, please notify me the first two weeks of the course.

Copyright Issue: Class and lecture notes for this course carry a copyright 2001 and author Donald H. Lenhert. Students are prohibited from selling (or being paid for taking) notes during this course to or by any person or commercial firm without the express written permission of the professor teaching this course.

Harassment Policy: "I believe that engineers must not only be the people who know how to do things right, but also those who know the right things to do." (Quote by Dr. Joseph Bordogna, National Science Foundation) One purpose of your education is to help you develop skills, approaches, and abilities that are necessary for effective teamwork, and for your success in your profession and as a citizen. It is important that you understand your rights and responsibilities regarding the University's Sexual and Racial Harassment policies. (full text of the policies can be found on KSU's web site at www.ksu.edu/uauc/fhbook/fhxj.html. If you experience any situations, in or out of class, that seem inappropriate or that make you uncomfortable, a list of resources and courses of action to assist you can be found on the College of Engineering web site at www.engg.ksu.edu/students/statement-harassment.htm.

Honor System: Kansas State University has an Undergraduate Honor System based on personal integrity which is presumed to be sufficient assurance in academic matters one's work is performed honestly and without unauthorized assistance. Undergraduate students, by registration, acknowledge the jurisdiction of the Undergraduate Honor System. The policies and procedures of the Undergraduate Honor System apply to all full and part-time students enrolled

in undergraduate courses on-campus, off-campus, and via distance learning.

A component vital to the Honor System is the inclusion of the Honor Pledge which applies to all assignments, examinations, or other course work undertaken by undergraduate students. The Honor Pledge is implied, whether or not it is stated: "On my honor, as a student, I have neither given nor received unauthorized aid on this academic work."

A grade of XF can result from a breach of academic honesty. An XF would be failure of the course with the X on the transcript indicating failure as a result of a breach of academic honesty.

For more information, visit the Honor System web page at www.ksu.edu/honor.

TOPICS (Approximate):

Class Material Class - Periods Reading

• Microprocessor Basics, Terminology, & Review 1 Harman Ch 1
• CPU32 Assembly Language 2 Harman Ch 5-9, CPU32
• Assembly Language and C relationship 2 Barr Ch 3, Van Sickle Ch 5
• C compiler and linker variations 1 Lecture
• C Programming for a Microprocessor or Microcontroller 3 Barr or Van Sickle
• Test Equipment 2 Lecture
• MC68332 Bus, SIM and Memory Interfaces 2 Harman Ch 2, 14, SIM Ref Manual
• Exceptions and Interrupts 1 Harman Ch 11
• TPU Module 2 Harman Ch 13 TPU Ref Manual
• A/D Conversion 2 Lecture
• QSM Module 2 Harman Ch 12
• Timing 4 Supplemental Manual, Lecture
• DMA 1 Harman Ch 14
• Other Intel and Motorola microprocessors and microcontrollers 2 Lecture
• Guest Speakers and Quizzes 3

COMPUTER USAGE:

• A Cross assembler and C compiler are available for a personal computer and are required on several assignments.
• Assembly language or C programs are required for most labs.
• The project requires both hardware and software components.

LABORATORY PROJECTS:

• Writing and testing of assembly programs and familiarization with a specific microcomputer. (2 weeks)
• Writing and testing of C programs and assembly language results for a microcontroller. (3 weeks)
• Testing of microcomputer hardware using digital test equipment. (1 week)
• Use of Microcontroller peripherals (3 weeks)
• Student-generated design project requiring both hardware and software. Oral presentation and written report required. (4 weeks)

COURSE REQUIREMENTS:

A. HOUR EXAMS AND FINAL EXAM

There will be two one-hour exams of 100 points each. The first exam covers software and will be given approximately one third of the way through the semester. The second exam covers hardware and will be given a little over two thirds of the way through the semester. A 100 point comprehensive final examination will be given during the regularly scheduled time of Final Week. Exams may be scaled. Most exam questions will be objective in nature. Samples of previous exams and exams will be made available in the Engineering Copy Center, prior to each event. The exams are closed book except for the MC68332 User's Manual CPU32 Reference Manual, SIM Reference Manual, QSM Reference Manual and TPU Reference Manual.

B. SHORT QUIZZES

Several short (5-10 minute) closed book quizzes may be given. These quizzes may or may not be announced. These are most likely when less than half the class is present when the beginning bell rings. There will be no make-ups for these quizzes since some may be dropped from counting toward the final grade.

C. HOMEWORK

1) Problem assignments. Problems will normally be assigned one week before due date. They will not be accepted for a grade after the end of the class period that they are due. Some of these assignments may be dropped from counting toward the final grade. Homework must have a cover sheet with your name, course name and number, assignment identification and due date unless otherwise specifically stated.

2) Laboratory Assignments. Laboratory Assignments will be handled similarly to problem assignments. Most laboratory assignments will require demonstration to a lab instructor for verification. Software laboratory assignments must be checked off before the beginning of the next laboratory period or a formal laboratory report must be submitted at that time with a copy of the source program in electronic form either attached or emailed to the lab instructor. Hardware laboratories must be verified before the beginning of the next laboratory. No formal write ups are possible.

3) Computer Assignments. Some of the problem assignments will require use of the computer. The student may use either the Computers in the laboratory, their own personal computer or the EECE PC network. Each student should have their own computer account number for the EECE network. If you do not have one forms are available in the EECE office (RA 261). Computer assignments should be submitted with the following format:

a. A cover sheet with your name, course name and number, assignment identification, and due date.

b. All non-computer sheets should be unfolded and be stapled together at the upper left hand corner in such a manner that every page is readily readable without any gyrations. The computer listing with comments should be included facing in the same direction as the other pages. The listing should not include any header or trailer pages and should be torn apart with each page folded in separately.

c. Documentation should include at least:

I. Statement of purpose (a complete English- language statement of the nature of the procedure and the problems that the program solves, together with any important restrictions)

ii. Flowchart - High level (primarily English- language which emphasizes the general organization of the procedure, i.e. - macroscopic flowchart)

iii. Detailed description of the algorithm used

iv. Storage of program and variables; including memory used for the program, memory used for variables, other memory usage (scratch pad, etc.), register usage, and stack usage.

v. Program listing with comments tied to (ii. and iii.) above.

vi. Testing - This includes the test values with the reason for each and its result.

vii. Conclusions

d. An electronic copy of the source program either attached or emailed to the instructor prior to the due date.

4) Oral Presentation. Midway between the end of the formal laboratories and the due date of the projects, project partners are expected to present a verbal presentation covering their project to the students in their lab. See "Guidelines for 10 Minute Presentations" on page 5.

D. PROJECT

The project teams must be groups of two students doing a combined hardware-software project. The final result will require a working prototype and a report covering it. The project schedule will typically be:

1) Every student will submit a short (few sentences) set of ideas that might be a project for two people for 1/3 of the semester. This is to be submitted during the fifth week. It is desired to get as many ideas as possible.

2) The instructor(s) will cull the list for size and practicability. They will then add their own ideas plus the ones submitted by other people and submit a list of ideas to the class within one week. More complete descriptions of the possible projects may be available in the laboratory.

3) The student will then pick a project, find a partner and submit a one page proposal without a cover sheet defining the project. This must be done within 1 week of the date the list is handed out. This proposal may be submitted earlier.

4) The instructor(s) can now judge the feasibility of the project. They will look at it in terms of size, combination of hardware and software, equipment availability, etc. The project will then be accepted or rejected with reasons or modifications suggested. If it is rejected another project proposal must be submitted during the next class period. However, project proposals may be submitted at any time prior to this time.

5) A short (several page) progress report will be submitted about halfway from the date proposals are due and the end of classes for the semester. The format may be specified by the instructor. The report should be written as though it was being submitted to the chief engineer. Consequently, it should define the project, give an overall view of what must be done to accomplish the project and what the present status. It should include any problems , lack of parts and a User's Manual for the finished product. Any of the information may be changed at a later time, but the change and its reasons must be included in the final report. The cover sheet should include an Executive summary in addition to the normal required information. An oral report over your project will be required during the last third of the semester. The oral presentation will be given to your project laboratory and should be slanted for the chief engineer and his/her staff. Requirement are documented on page 5.

6) The working project must be demonstrated by 4:30 p.m. on the last scheduled class day prior to DEAD week (the last week of the semester). See the syllabus for the exact date. With respect to hardware, the policy is if the department supplies it, the department keeps it. If the student supplies it, the student keeps it. Check with your instructor as to the parts available for loan.

7) The final report covering the project, program listing and documentation must be turned in by 4:30 p.m. on Tuesday of the last week of classes (DEAD Week). Final project report must be typed, however figures may be neatly hand drawn. Report must be 8.5" by 11" with any computer listings trimmed or photo reduced to this size. Sample reports are available in the laboratory for students to look at. Project reports become the property of the department. They may be useful in future semesters. Students may borrow (or look at) their report after it has been submitted for grading, but the report will NOT be returned to them.

8) All hardware must be returned by the time specified in the course syllabus.

E. APPROXIMATE GRADING:

Hour Quizzes 200 pts

Quizzes and Homework¹ 080 pts

Laboratory¹ 185 pts

Project 200 pts

Final Examination 100 pts

TOTAL 765 pts

¹ Since the instructor realizes that things the student can't control can happen, the lowest scores (amounting to as much as 10% of that assigned) may be dropped.

The grade for a specific percentage can approximately be interpreted as follows:

This scale may be adjusted downward at a later date (i.e. 88-87 = A B). It will NOT be adjusted upward!!! Since the laboratory is considered an important portion of the course, a student who does not have at least 61 percent of the total points in the laboratory will NOT pass the course!! (That is, you must obtain at least 110 counted points in laboratory in order to not automatically fail the course.) Any students fitting into the grade break areas (e.g. A-B) will be evaluated on an individual basis as to grade received.

Those students taking this course for graduate credit may be required to do additional work (beyond that required for those taking the course for undergraduate credit). Furthermore, those taking this course for graduate credit may be held to a higher standard that those taking the course for undergraduate credit. Under no circumstances will the previous grade scale be raised.

Withdrawals: Course does not show on transcript if dropped by the end of the fifth week; if dropped by the end of the ninth week the grade will be a W. An incomplete grade is seldom given and require very special circumstances.

The formal report should be typed or neatly written in the following format:

I. Identification page

A. Name

• Course name and number

C. Date due

D. Assignment identification

II. Statement of the problem (use assignment sheet expanded)

III. An ENGLISH description

IV. Flowchart (high level)

V. Storage of program and variables

A. Memory used for program

B. Memory used for variables (list individually)

C. Other memory usage (scratch pad, etc.)

D. Registers used and stack usage in bytes

VI. Code the program in the following format:

Assembly Language:

LABEL MNEMONIC OPERAND COMMENTS

C Code:

LABEL C Statement Comments

VII. Testing

A. Give test values

B. Give result for each test value

C. Give the reason each test value was used

VIII. Include electronic copy of the source program or email to lab instructor prior to deadline.

Be sure to note any limitations to the program or any assumptions that were made.

1. You have exactly 8-12 minutes in which to present your material. Each lab partner should contribute equally to the presentation. Failure to do so will result in a reduced grade and possibly differing grades for each partner.

2. The presentation will be to your entire project lab and should be made as if it were to the Chief Engineer and his/her staff (At least two levels of management above you). You must explain the project and the technical portion of it in sufficient detail so that the chief engineer can understand it. The presentation will be made to the rest of your lab abd evaluated by them in addition to the evaluation by the instructor(s).

2. You must cover the hardware completed, the percentage of hardware completed, the software completed, the percentage of software completed, and the percentage of hardware-software integration completed. These should be made in the perspective of the entire project.

3. You may find it useful to have visual aids (charts, schematics, etc). PowerPoint equipment will be available.

4. Your outward appearance will NOT be as important as the content and clarity of the information you present. You should be prepared and be sufficiently proficient with regard to your material. You must convince your instructor and class members that you know what you are doing and that it will be completed in a timely manner. Organization is of the utmost importance!

5. You will schedule a time at which to do your presentation in your meeting with your instructor in the week prior to your presentation. Your allocated time will begin at the start of your appointment, not at the time you arrive for your appointment.

6. If, for any reason, you need to reschedule your appointment, you must contact your instructor immediately. If your excuse is valid, then you will be permitted to reschedule. (The instructor will decide if your excuse is valid.) If not, the original appointment stands. Failure to meet at your appointed time or make arrangements to reschedule will result in a zero grade for the persons involved. No makeups are permitted.

The proposal may be submitted at any time prior to the required time but MUST have the following information:

1. A partner

2. No more than one page (Cover sheet is not to be included)

3. A brief description of the hardware (must have hardware)

4. A brief description of the software (must have software)

5 Enough information for the instructor to evaluate the relative size of the project and if it is feasible.

When references or a bibliography are requested, it is important to recognize the difference. References MUST be referred to in the text with a superscript number. The superscript number is then included in the Reference section with the appropiate citation. This citation should be to a specific page or section of the reference. Ex:

1 Thomas L. Harmon, The Motorola MC68332 Microcontroller; Product Design, Assembly Language and Interfacing, Prentice Hall, Englewood Cliffs, NJ 07632, 1991, p145.

A bibliography is nothing more than a list of book or articles that supply more information such as the sections on Further Reading at the end of most chapters in Harmon. Ex:

Wakerly, John F., Microcomputer Architecture and Programming. The 68000 Family. Wiley, New York, NY, 1989.

Note that the authors are referred to in a different manner. One should be consistent. The four ways that one might put John Wakerly's name in a reference is: Wakerly, J. F. or J. F. Wakerly or Wakerly, John F. or Wakerly, John F.. A specific magazine or group may have a preferred method. Also the title of a book may be either underlined or italicized.

An operator's or user's manual normally has several sections. These sections are the Installation, Use, Error Handling, and Safety. The Installation section is many times called Getting Started and includes what the system will do, the parts included with the system and how to put the system into working condition. In the case of this class it should include the software installation, all connections and parts that should be available.

The Use section should include all the input and output device descriptions, such as the switches and buttons with their function. Also include how to operate the system and what outputs should be observed based on what inputs.

The error handling should include what the user should do it what was described in the previous section does not occur. Who to contact in the case of problems that can't be handled by the user.

The safety section should include warnings to avoid liability when someone uses your system. There are many examples of these in the everyday things you use. Most of these warnings are included because of some lawsuit over the use of the equipment in what you may consider ridiculous ways. For example, the warning on the Iron to not to iron clothes while you are wearing them because you may burn yourself.

Final project report must be typed, however figures may be neatly hand drawn. Report must be 8.5" by 11" with any computer listings trimmed or photo reduced to this size.

Title Page.

Table of Contents (number ALL pages).

Introduction (short and concise).

What's it good for?

Description of overall project.

Hardware Description.

English description of what you did.

Block diagram.

Testing methods.

Detailed schematics and parts list as an appendix.

Software Description.

English description of the general software.

Testing methods.

High level flowchart in English!

Hardware-Software Tradeoffs.

Why you made the choices you did.

Operational Analysis.

What worked, how well, and what didn't work and why not?

What you tried that didn't work.

Future Developments and Expansions.

How you might improve it?

Is there a better way?

Spin-off project ideas (short discussion).

Conclusions

References or Bibliography (See page ?).

Appendices.

Hardware - Schematics, PC boards, layout, parts list, pertinent device specifications.

Software - C compiler input with comments, low level flowcharts, disk containing source file and object listing.

Operator's Manual - for the dumb but literate operator (See page ?).

Others as needed.

Above order is not critical but is to be included somewhere.

ONE FINAL WORD WITH RESPECT TO YOUR PROGRAMS.

SOURCE file included on disk with your report with name in body of report and on the cover.

LISTING file as a hard copy in your report

OBJECT file included on disk with your report

100 scale points possible Names ____________________

(NO, your project report is not worth 100 pts)

A. Required Documentation (60 scale pts) (Use partial if poor)

SCALE

RECEIVED POINTS ITEM

________ 2 Title page

________ 2 Pages numbered

________ 2 Table of Contents

________ 4 Introduction - General Description

HARDWARE

________ 4 English description

________ 4 Block Diagram

________ 3 Schematics - Appendix (See CEHWWP.html on 631 web page)

________ 3 Parts List - Appendix (See CEHWWP.html on 631 web page)

SOFTWARE

________ 4 English description

________ 4 High level flowchart

________ 6 C compiler and/or assembler listing files with comments - Appendix

________ 4 Operational Analysis - Testing

________ 3 Future Developments

________ 3 Conclusions

________ 3 How to make changes

APPENDICES AND OTHER DOCUMENTATION

________ 4 Users Manual

________ 3 C Source files with same filename as Object file) on disk with report and filename in report and on cover .

________ 2 Object file (OBJECT file with project filename and extension .S19) on disk with report and filename in report and on cover.

B. General Documentation (40 scale pts) (Quality)

SCALE

RECEIVED POINTS ITEM

________ 5 INTRODUCTION - Quality - Did you understand what they were doing?

________ 10 Hardware - Purpose

Understandable

Schematics easily followed

________ 10 Software -

English understandable

Flowcharts easily followed

Assembly listing comment easily followed

________ 5 Conclusions - Integration

________ 10 Operators Manual - Adequate, error conditions

Deduct for spelling errors and English!

COMMENTS______________________

COMPUTER INFORMATION

The Motorola 68332 microcomputer boards are connected to a personal computer. These computer boot up in Windows. Since most of our programs are DOS programs it will be necessary to open a DOS window. This computer contains a hard drive (C) and at least one floppy drive (A). Drive C contains the Windows 95 operating system, a terminal emulator program (Kermit), cross assemblers for the MC68332, several C compilers (commercial and freeware versions) and a few object files for lab use. Drive C is NOT to be used for student programs!!! If it is used during the lab, your files MUST be erased before leaving lab. ANY FILES LEFT ON DRIVE C MAY OR MAY NOT BE THERE THE NEXT TIME YOU COME TO LAB. Drive A is a 3½" 1.44 Mbyte floppy. A floppy should be brought to lab or log on to the Network and use your H drive. The floppy will be used for the student to keep source and object files. It is recommended that listing files not be kept on the floppy except temporarily as they require lots of space and can be regenerated quickly for the source file. Copies of any of the programs (except commercial software such as the Tasking C Compiler and Windows) are available for download from the EECE PC system under Z:\PUBLIC\LENHERT\EE631.

If on a Windows system go to MSDOS. From the DOS prompt (C>) type:

FORMAT A:

The computer will respond with the format version and the statement:

Insert new disk in drive A:

and press RETURN when ready.

Insert the floppy disk to be formatted into drive A and press RETURN.

After a period of time you will get the following statement:

Enter desired volume label (11 characters, RETURN for none)?

Enter your last name followed by a RETURN. This way if you leave your disk in the lab it can be returned to you. The system will give you a number of bytes on the formatted disk. If the two numbers do not match on the 360K floppy, ask your instructor for another disk as that disk may be bad. Then the system will ask:

Do you want to format another disk (Y/N)?

Answer no and the system will return you to DOS showing the DOS prompt (C>).

The printer in the lab is on the EECE network and the lab computers are programmed to print on it as lpt2, however you must be logged into the EECE network. To print a listing file on the computer generated by the cross assembler or compiler type:

copy filename.lis lpt2:

OR use reditection

type filename.lis >lpt2:

The listing file will print on the printer in the lab.

Kermit is a MS-DOS general terminal emulator program which is available for many computer systems. We will only be using a small portion of its capability. Consequently, only that portion will be discussed here. The Kermit initialization files have been already set up for 9600 baud, 8 data bits, no parity, one stop bit and to use port COM2.

To run the program after obtaining a MS-DOS window, if using a machine that boots in Windows, type:

KERMIT

NOTE: DO NOT USE THE KERMIT ICON ON A WINDOWS MACHINE IF YOU PLAN TO UPLOAD A FILE FROM THE MC68332 EVK.

The following commands are the only ones that will then be needed:

C to connect to the MC68332 system.

CTRL-]C to return to Kermit

LOG SESSION to record the data coming from the MC68000 system

CLOSE SESSION to cease recording incoming data

PUSH When in Kermit to return to DOS temporarily

EXIT To return back to Kermit for DOS PUSH command

NOTE: CTRL-] means to hold the ctrl key down while pressing the ] key. <cr> indicates the enter or return key.

The file generated will have some additional information at the top, but this does not affect the download since the MC68332EVK looks for an S0 to start loading information. For more information on the S19 file format see Section 5.1.2 starting on page 143 of Harman.

To download an object file (S19) from the Computer to the MC68332 boards the following steps are necessary:

kermit<cr> to invoke the terminal emulator

c<cr> to connect to the MC68332 boards

LO<cr> to tell TUTOR that a file is coming

CTRL-]C to get back to Kermit

exit to get to DOS

type a:file.rec > com2 <cr> to tell dos to print the file to port COM2

kermit to invoke the terminal emulator again

c<cr> to connect to the MC68332 board

<cr> to finish the load

<cr> And display error messages

NOTE: CTRL-C means to hold the ctrl key down while pressing the c key. <cr> indicates the enter or return key.

To upload an object file from the MC68332 board to the Computer the following steps are necessary:

CTRL-]C to get back to Kermit

LOG SESSION a:myfile.rec <cr> to tell Kermit to record the information from the MC68332 in the file 'myfile.rec'.

c<cr> to connect to the MC68332 board

DU begaddr endaddr<cr> to transmit a file to the console (Kermit) (and log in 'myfile.rec')

CTRL-]C to get back to Kermit

CLOSE SESSION<cr> to close the log file

c<cr> To connect to the MC68332 board

GENERAL

1. The lab is normally open from 8 AM to 5 P.M. on days when university classes are in session. If it is not open when the EECE office is open, it may be requested to be opened from 8 A.M. to 12:00 P.M. and 1 P.M. to 5 P.M. on normal university work days by asking an EECE Departmental secretary (RA 261).

2. At other times a key to the lab is available for check-out. See Key Policy.

3. There is to be NO SMOKING OR CHEWING of tobacco in the laboratory.

4. There is to be NO food or drinks on the equipment benches.

5. All equipment is to be used at the benches and if moved within the lab it should be replaced before leaving the lab.

6. Keep all benches clean and straight.

7. Any equipment believed to be faulty is to be tagged with a fluorescent green tag with the symptom, date and person tagging it.

8. Equipment may not be removed from the lab without the instructor's approval and signing it out on the lab sign out sheets.

9. Data books are available in RA278 and RA287. They may be removed from the lab only for two hours to copy and must be signed out on the data book sign out sheet.

11. The lab is not available for use when a scheduled lab is in session except after 3:30 PM WITH the lab instructors permission.

CLASS SPECIFIC

1. Do not leave equipment wired or connected up when your lab period is over or when leaving the lab.

2. All students are expected to attend the lab to which they are assigned. If you desire or need to attend another lab and that lab is full you must find someone who will swap with you. Both students are expected to tell the instructor of the lab they are attending the reason they are there.

3. Problems will be checked off ONLY during your lab period or during one of the posted lab instructor hours.

4. The lab instructor will not answer questions of students not in their lab during lab as long as the instructor's lab students have questions or problems.

1. The key to the lab (RA 287) may be checked out from one of the secretaries in the EECE Office (RA 261) during normal office hours. The student checking out the key is expected to record his name, phone number, and the expected time that they will be coming into the lab on the check-out sheet. This information is so that other students desiring to use the lab may contact you.

2. The key is to be returned to the EECE office by 10:30 a.m. the next day that the office is open. If the key was checked out on Monday through Thursday, it is due the next day. If the key was checked out on Friday or a day before a vacation in which the office isn't open the next day, then it must be returned by 10:30 a.m. the Next day the office is open.

3. If the key is not returned by the above time, the person failing to return the key will lose his key check out privileges for a period of time. During project time the entire project team will lose their check out privileges.

4. The key may be transferred between students in the class during an evening or on the weekend. However, it is imperative that you know who you gave the key to so that if it is not returned you will not lose your privileges.

5. The person with the key is responsible for the equipment in the lab and that the lab is occupied at all times that it is unlocked. Be sure to lock the door with the key before leaving.

6. Rathbone Hall is locked at approximately 11:00 p.m. each evening. Undergraduates in the building may stay, but they must have identification handy in case security requires it (Graduate students may also be required to show proof of identity after this time). Undergraduates will not be able to get in until the following morning.

7. Starting the first week of no formal labs, all rules and restrictions which formerly applied to individuals will now apply to project teams. For example, keys will now be checked out to a team as opposed to a single individual. Be careful, suspension of key privileges because of a violation of policy will now apply to the project team!

8. Students with a key who leave the lab open or unlocked, and unattended after hours have violated the key policy. Key privileges will be immediately suspended for a time consistent with department policy. Equipment in the lab is valuable. This kind of invitation for theft is unacceptable.

10. This policy is subject to change without notice pending department policy changes. For the definitive reference on the current policy, contact the instructor or the appropriate secretarial staff in the EECE Department Office (RA261).

11. The ability to check-out a key is a privilege that is given by the instructor of this course. Consequently, the instructor reserves the right to terminate this privilege to any student (or group of students) at any time.

OPEN HOUSE RULES AND REGULATIONS FOR EECE-631 STUDENTS AND OTHERS WHO WISH TO USE ANY OF THE FACILITIES OF RA287 (MICROPROCESSOR LAB)

The following requirements apply to those microprocessor students that will require microprocessor instructor/course "assistance" (e.g. equipment, instructor assistance, parts, microprocessor board/system, etc.) with the presentation of their project at Open House. Students requiring absolutely no instructor/course "assistance" do not have to follow these guidelines.

Fall semester microprocessor students expecting to demonstrate for Open House may hold onto their parts at the end of the fall semester. They should indicate their interest in an Open House presentation to the course instructor as well as the departmental student Open House coordinator(s).

To receive instructor "assistance" a working project must be demonstrated to one of the course instructor(s) no later than 5 PM Tuesday prior to Open House. At this time the instructor(s) will select approximately three to five projects. These selected projects will receive continued "assistance." Projects not selected will receive NO further "assistance."

Students with unselected projects from the fall semester with departmental parts and/or equipment must return them by the end of the day Thursday prior to the start of Open House. Students with selected projects from the fall semester with departmental parts and/or equipment must return them by the end of the day Friday after Open House.

All spring semester students expecting extra credit (10% on project grade) for an Open House presentation must demonstrate a working project by this Tuesday deadline as well as display their project during Open House. A final presentation for the purpose of course and extra credit evaluation will be done sometime during Open House or can be done later if more work is planned.

ADDR CSPAR0 CSPAR1

00FFFA44 3FFF 03FF

CSBARBT CSORBT

00FFFA44 0E04 68B0 CSBOOT

CSBAR CSOR

ADDR23-11 BLK HEX M B R S D S I A HEX CHIP

SZ VALUE O Y / T S P P V VALUE SELECT

D T W' R A A L E

E E B C C C

K E '

00FFFA4C 0000000000000 011 $0003 0 10 10 0 0000 11 111 0 503E CS0

00FFFA50 0000000000000 011 $0003 0 01 10 0 0000 11 111 0 303E CS1

00FFFA54 0000000000000 011 $0003 0 11 01 0 0000 11 111 0 683E CS2

00FFFA58 0000000000000 000 $0000 0 00 00 0 0000 00 000 0 0000 CS3

00FFFA5C 1111111111111 000 $FFF8 0 11 01 0 0000 00 111 1 680F CS4

00FFFA60 1111111111101 000 $FFE8 0 11 11 0 0000 11 111 1 783F CS5

00FFFA64 0010000000000 100 $1004 0 01 11 0 0011 11 000 0 38F0 CS6

00FFFA68 0010000000000 100 $1004 0 10 11 0 0011 11 000 0 58F0 CS7

00FFFA6C 0000000000000 011 $0103 0 11 01 0 1101 11 000 0 6870 CS8

00FFFA70 0000000000000 011 $0103 0 01 10 0 0000 11 000 0 3030 CS9

00FFFA74 0000000000000 011 $0103 0 10 10 0 0000 11 000 0 5030 CS10

EVK Uses of Chip Selects

CSBOOT BCC EPROM U4 CS

CS0 BCC RAM U3 W'

CS1 BCC RAM U2 W'

CS2 BCC RAM U2 & U3 G'

CS3

CS4

CS5

CS6 PFB EPROM/RAM U2 G' & E'

CS7 PFB EPROM/RAM U4 G' & E'

CS8 PFB RAM U1 & U3 G'

CS9 PFB RAM U1 W'

CS10 PFB RAM U3 W'

Port C PC[6:0] PC6 CS9 ADDR22 CS for PFB RAM U1 W'

PC5 CS8 ADDR21 CS for PFB RAM U1 & U3 G'

PC4 CS7 ADDR20 CS for PFB EPROM/RAM U4 G' & E'

PC3 CS6 ADDR19 CS for PFB EPROM/RAM U2 G' & E'

PC2 CS5 FC2 AVAILABLE FOR EITHER CS OR FUNCTION CODE

PC1 CS4 FC1 AVAILABLE FOR EITHER CS OR FUNCTION CODE

PC0 CS3 FC0 AVAILABLE FOR EITHER CS OR FUNCTION CODE

Port E PE[7:0] PE7 PE7 SIZ1 NOT USED

PE6 PE6 SIZ0 NOT USED

PE5 PE5 AS' MC68881 IF INSTALLED

PE4 PE4 DS' MC68881 IF INSTALLED

PE3 PE3 RMC' NOT USED

PE2 PE2 AVEC' NOT USED

PE1 PE1 DSACK1' MC68881 IF INSTALLED

PE0 PE0 DSACK0' NOT USED

Port F PF[7:0] PF7 PF7 IRQ7' ABORT SWITCH

PF6 PF6 IRQ6' NOT USED

PF5 PF5 IRQ5' NOT USED

PF4 PF4 IRQ4' NOT USED

PF3 PF3 IRQ3' NOT USED

PF2 PF2 IRQ2' NOT USED

PF1 PF1 IRQ1' NOT USED

PF0 PF0 IRQ0' NOT USED

Port QS PQS[7:0] PQS7 PQS7 TXD RS232 TO COMPUTER TERMINAL

PQS6 PQS6 PCS3 NOT AVAILABLE IF AUXILIARY BOARD INSERTED

PQS5 PQS5 PCS2 NOT AVAILABLE IF AUXILIARY BOARD INSERTED

PQS4 PQS4 PCS1 NOT AVAILABLE IF AUXILIARY BOARD INSERTED

PQS3 PQS3 PCS0/SS NOT AVAILABLE IF AUXILIARY BOARD INSERTED

PQS2 PQS2 SCK NOT AVAILABLE IF AUXILIARY BOARD INSERTED

PQS1 PQS1 MOSI NOT AVAILABLE IF AUXILIARY BOARD INSERTED

PQS0 PQS0 MISO NOT AVAILABLE IF AUXILIARY BOARD INSERTED

000000 - 002FFF System RAM CC U2 & U3 CPU32Bug - USE AT YOUR OWN RISK!!

003000 - 00FFFF Target RAM BCC U2 & U3 Available for User

010000 - 01FFFF Optional RAM PFB U1 & U3 Can be populated

020000 - 0DFFFF NOT USED

0E0000 - 0FFFFF CPU32BUG EPROM BCC U4 CPU32Bug usage

100000 - 11FFFF Optional RAM/EPROM PFB U2 & U4 Can be populated

120000 - FFE7FF NOT USED

FFF000 - FFFFFF MCU Modules INTERNAL See MC68332 User's Manual

XXX000 - XXX7FF Internal RAM INTERNAL Location can be configured on power-up/reset

1. Locate each of the following:

a. the nearest Fire Exit,

b. the nearest Fire Alarm,

c. the nearest Fire Extinguisher, and

d. the nearest Telephone from which emergency services may be summoned. Record how to summon help.

This first part is trivial and is for your safety and ABET accreditation. The equipment with which you will be required to use is extremely safe. Voltages and currents are small (with respect to dangerous levels).

The purpose of the remaining portions of this lab is to become comfortable with this equipment. You will be using it all semester so you might as well learn how to use it now. You do not need to have these problems checked-off in order.

You are strongly encouraged to familiarize yourself with the CPU32BUG Monitor. The ease with which you complete future assignments may be related to your familiarity with the microprocessor systems. If you are not sure what a command does, then try it. It is virtually impossible to do permanent damage to the systems with any software command.

2. To connect the computer to the M68332EVK type kermit then c (refer to page 8). To become familiar with the M68332EVK system, read sections 3.5 through 3.7 in the M68332EVK Evaluation Kit User's Manual ( there is one at each station). There is a CPU32BUG Debug Monitor User's Manual at each station. This manual explains each of the instructions. Read about the debug commands (Chapter 3) in the CPU32BUG Debug Monitor User's Manual. Go through most of the familiarization steps in this lab using the commands shown on page 22, 24. The memory available for the student to use on the 68332 starts at $3000 and goes to $FFFF. The complete memory map is given on page 12

A summary of the CPU32BUG commands is given after the discussion.

3. Work through the material given below to understand the operation of CPU32BUG. If there are questions read Chapter 3 in CPU32BUG Debug Monitor User's Manual . The commands listed by the help command below are summarized on page 22, 24. The lines starting with an * are added comments and the characters after CPU32BUG > should be entered followed by a carriage return. The system calls are summarized on page 21.

* Help command lists CPU32BUG commands

CPU32Bug>he

BC Block Compare

BF Block Fill

BM Block Move

BR Breakpoint Insert

NOBR Breakpoint Delete

BS Block Search

BV Block Verify

DC Data Conversion and Expression Evaluation

DU Dump S-Records

GD Go Direct (no breakpoints)

GN Go and Stop after Next Instruction

GO Go to Target Code

G "Alias" for previous command

GT Go and Insert Temporary Breakpoint

HE Help Facility

LO Load S-Records

MA Macro Define/Display

NOMA Macro Delete

MAE Macro Edit

MAL Enable Macro Expansion Listing

NOMAL Disable Macro Expansion Listing

Press "RETURN" to continue

MD Memory Display

MM Memory Modify

M "Alias" for previous command

MS Memory Set

OF Offset Registers

PA Printer Attach

NOPA Printer Detach

PF Port Format

RD Register Display

RESET Warm/Cold Reset

RM Register Modify

RS Register Set

SD Switch Directory

T Trace Instruction

TC Trace on Change of Flow

TM Transparent Mode

TT Trace to Temporary Breakpoint

VE Verify S-Records

* To display memory starting at $E0000 and displays the data (hex) in

* word sized blocks for 16 bytes. After the hex display is

* The ASCII equivalent of the byte hex values.

CPU32Bug>md e0000

000E0000 0000 2FFC 000E 0090 0002 0000 20FF 3033 ../|........ .03

* ;DI option invokes the disassembler option. Displays both

* the hex data and the assembler format for that data.

CPU32Bug>md e0000 ;di

000E0000 00002FFC ORI.B #$FC,D0

000E0004 000E DC.W $E

000E0006 00900002 0000 ORI.L #$20000,(A0)

000E000C 20FF DC.W $20FF

000E000E 30330003 MOVE.W $3(A3,D0.W),D0

000E0012 58300003 ADDQ.B #$4,$3(A0,D0.W)

000E0016 38300103 68700103 MOVE.W ([$0.N,A0,D0.W*1],$68700103.L),D4

000E001E 30301004 MOVE.W $4(A0,D1.W),D0

* Memory Modify the data starting at $3000. Default is word data.

* <cr> goes to next address

* ^ backs up one line

* . (period) exits memory modify and goes back to CPU32BUG.

CPU32Bug>mm 3000

00003000 00FF? 1234

00003002 00FF? 2345

00003004 00FB? 3456

00003006 00F7? 4567

00003008 FF92? ^

00003006 4567? ^

00003004 3456? ^

00003002 2345? ^

00003000 1234? .

* Memory modify option ;b displays data in byte format (8 bits).

CPU32Bug>mm 3000 ;b

00003000 12? 00

00003001 34? 12

00003002 23? 23

00003003 45? 34

00003004 34? 45

00003005 56? ^

00003004 45? ^

00003003 34? ^

00003002 23? ^

00003001 12? ^

00003000 00? .

* Memory Set command - Sets the data at the specified memory location

* to the specified data (data can be up to 8 characters.

* Data is expected to be in hex format (No $)

* If the data is enclosed in quotes such as 'ABC'

* the ASCII equivalent of the character is stored.

CPU32Bug>ms 3000 abcd

*This shows data was set

CPU32Bug>mm 3000

00003000 ABCD?.

* This shows setting the ASCII equivalent of text

CPU32Bug>ms 3000 'microprocessor'

* This shows it was modified by noting the ASCII equivalent

CPU32Bug>md 3000

00003000 6D69 6372 6F70 726F 6365 7373 6F72 FF00 microprocessor..

* This shows what you will get if the memory display command

* requests and out of range address

CPU32Bug>md 200000

Exception: Bus Error

PC=000E6F78, SR=2704

Format/Vector=C008

SSW=0055 Fault Addr.=00200000 Data=0000FFFF Cur. PC=000E6F78 Cnt. Reg.=000C

* The following command display the register values

CPU32Bug>rd

PC =00003000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00010000

D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000

D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000

A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000

A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000

00003000 6D69 DC.W $6D69

* The following command displays an individual register value

CPU32Bug>rd =d6

D6 =00000000

00003000 6D69 DC.W $6D69

* The following command sets an individual register value

CPU32Bug>rs a2 45dc

A2 =000045DC

* This command displays the offset contained in registers R0 - R6

* The offset in R7 is always zero.

CPU32Bug>of

R0 =00000000 00000000 R1 =00000000 00000000

R2 =00000000 00000000 R3 =00000000 00000000

R4 =00000000 00000000 R5 =00000000 00000000

R6 =00000000 00000000 R7*=00000000 00000000

* The Data Conversion command converts a hex expression into hex and decimal.

CPU32Bug>dc 10

00000010 = $10 = &16

CPU32Bug>dc -10

SIGNED :FFFFFFF0 = $10 = -&16

UNSIGNED:FFFFFFF0 = $FFFFFFF0 = &4294967280

* The Block Fill command fills memory with a word starting at a word boundary.

CPU32Bug>bf 4000 401f eece

Effective address: 00004000

Effective address: 0000401F

* This shows the data that was filled

CPU32Bug>md 4000 401f

00004000 EECE EECE EECE EECE EECE EECE EECE EECE nNnNnNnNnNnNnNnN

00004010 EECE EECE EECE EECE EECE EECE EECE EECE nNnNnNnNnNnNnNnN

* The Block Move command copies blocks of memory from one area to another.

CPU32Bug>bm 4000 400f 3000

Effective address: 00004000

Effective address: 0000400F

Effective address: 00003000

* This shows original data and that it was moved.

CPU32Bug>md 3000

00003000 EECE EECE EECE EECE EECE EECE EECE EECE nNnNnNnNnNnNnNnN

* The Block Search command searches a block of memory and shows

* every address at which it occurs in the search area

CPU32Bug>bs 3000 301f ee ;b

Effective address: 00003000

Effective address: 0000301F

00003000|EE 00003002|EE 00003004|EE 00003006|EE

00003008|EE 0000300A|EE 0000300C|EE 0000300E|EE

* The Block Verify command shows every address at which the data

* is not matched.

CPU32Bug>bv 3000 301f eece

Effective address: 00003000

Effective address: 0000301F

00003010|00FF 00003012|00FF 00003014|00FF 00003016|00FB

00003018|FF31 0000301A|FF00 0000301C|FF00 0000301E|FF00

* The Dump command dumps memory to the specified port (default is the terminal)

* The output format is the S19 object code format.

CPU32Bug>du 4000 401f

Effective address: 00004000

Effective address: 0000401F

S0030000FC

S1234000EECEEECEEECEEECEEECEEECEEECEEECEEECEEECEEECEEECEEECEEECEEECEEECEDC

S9034000BC

* The Red ABORT button on the MC68332 board was pushed

CPU32Bug>

Exception: ABORT

* The red reset button on the MC68332 board was pushed

CPU32Bug>

CPU32Bug Debugger/Diagnostics - Version 1.00

(C) Copyright 1991 by Motorola Inc.

* The RESET command was entered. A warm start keeps all static variables including

* breakpoints, target register state and offset register values. A cold start is

* the default at power up and initializes ALL static variables with their start

* up values

*

CPU32Bug>reset

Cold/Warm Start=C (C/W)? w

SOFTWARE ABORT

PC=00009FAC SR=2704=.S7..Z.. US=FFFFFFFF SS=0000075A

D0=0000FF00 D1=00000000 D2=FFFF0003 D3=00000000

D4=000000FC D5=000005C0 D6=00000003 D7=00000000

A0=00010040 A1=000000C0 A2=FFFF8000 A3=00008101

A4=00008100 A5=00000540 A6=00000540 A7=0000075A

--------------------009FAC 6600FED0 BNE.L $009E7E

* Assembler instructions may be entered directly rather than with their hex values

CPU32Bug>mm 3000 ;di

00003000 EECE DC.W $EECE? move.w #0,ccr

00003000 44FC0000 move.w #0,ccr

00003004 EECE DC.W $EECE? move.w #$101c,a0

00003004 307C101C move.w #$101c,a0

00003008 EECE DC.W $EECE? move.w #4380,a1

00003008 327C4380 move.w #4380,a1

0000300C EECE DC.W $EECE? trap #15

0000300C 50FA0015 trap #15

* NOTE that the trap number was entered in to the computer as a HEX number not as a

* decimal as we expected and wanted. We should have entered it as TRAP #0F. The assembler assumes all numbers without a prefix are HEXADECIMAL

00003010 00FF DC.W $FF? dc.w $0063

00003010 0063 dc.w $0063

00003012 00FF DC.W $FF? syscall .return

00003012 4E4F0063 syscall .return

00003016 00FB DC.W $FB? .

* Now reenter the trap instruction as trap #0f.

CPU32B> mm 300c ;di

0000300C 50FA0015 trap #15? trap #0f

0000300C 50FA000F trap #0F .

* Compare the hex value in memory location $300F in the two cases.

* To test what happens with these commands we will put a breakpoint in at the

* trap #15 instruction

CPU32Bug>br 300c

BREAKPOINTS

0000300C

* We show the registers before executing the program

* The registers are really a specific set of memory locations and are initialized by

* the monitor on startup.

CPU32Bug>rd

PC =00003000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00010000

D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000

D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000

A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000

A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000

00003000 44FC0000 MOVE.W #$0,CCR

* We will execute the prorgam

CPU32Bug>g 3000

Effective address: 00003000

At Breakpoint

PC =0000300C SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =00010000

D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000

D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000

A0 =0000101C A1 =00004380 A2 =00000000 A3 =00000000

A4 =00000000 A5 =00000000 A6 =00000000 A7 =00010000

0000300C 50FA0015 TRAPT.W #$15

* Note that when the registers are displayed the values were entered as hex numbers whether the $ sign

* preceded the number or not and the registers were updated at the breakpoint.

.

* We will now trace one command (the trap #15 command)

CPU32Bug>t

PC =000E2FC4 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =0000FC00 SSP* =0000FFF4

D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000

D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000

A0 =0000101C A1 =00004380 A2 =00000000 A3 =00000000

A4 =00000000 A5 =00000000 A6 =00000000 A7 =0000FFF4

000E2FC4 007C0700 ORI.W #$700,SR

* We will now execute the Syscall command and see that it returns us to CPU32BUG

* without displaying the registers

CPU32Bug>go 3012

Effective address: 00003012

CPU32Bug>

4. Switch from the CPU32BUG to the CPU32Diag (refer to Chapter 6 in the CPU32BUG Debug Monitor User's Manual.) And run the march address test and the walk a bit test on memory locations $003000 to $010000 (See page 22). Check the memory locations after running. Show the results to your instructor. Note: that these tests are memory destructive!!. The CPU tests do not work.

5. There are three different ways of debugging a computer program in the lab. Two of these are essentially the same, but require different software and hardware. We have one of each of these on each bench. We will cover these two methods in the next laboratory. The third way is by using the CPU32BUG commands directly. We shall do this method first. Enter the data shown below into the MC68332 using the Memory Modify command. The data to be entered was displayed using a memory display command.

md 5100 :40

005100 12 34 56 78 9A BC DE F0 0F ED CB A9 87 65 43 21 .4Vx.<^p.mK).eC!

005110 11 11 11 11 22 22 22 22 33 33 33 33 44 44 44 44 ....""""3333DDDD

005120 24 68 AC F1 35 79 BD E0 1F DB 97 53 0E CA 86 42 $h,q5y=`.[.S.J.B

005130 22 22 22 22 44 44 44 44 66 66 66 66 FF FF FF FF """"DDDDffff....

Enter the program below using the MM 5000;di command.

move.w #0,ccr

move.w #$511c,ao

movea.w #513c,a1

addx.l -(a0),-(a1)

cmp.w #5100,a0

bne $500c

trap #$f

dc.w 63

The results should be the same as shown with the exception of the comments which I have added.

CPU32Bug > MD 5000:8 ;DI

005000 44FC0000 MOVE.W #$0,CCR ;CLEAR X BIT

005004 307C511C MOVEA.W #$511c,A0 ;POINT TO OPERAND 1

005008 327C513C MOVEA.W #$513c,A1 ;POINT TO OPERAND 2

00500C D388 ADDX.L -(A0),-(A1) ;ADD, AUTO PREDECREMENT

00500E B0FC5100 CMPA.W #$5100,A0 ;DONE?

005012 6600FFF8 BNE.W $500C ;IF NOT GO BACK

005016 4E4F0063 SYSCALL .RETURN ;RETURN TO CPU32BUG

Note that the line by line assembler recognized that the move instruction and the compare instructions were to or with an address register so changed the mnemonic to the correct form. Also note that all values whether preceded by a $ or not were assumed to be hexadecimal. NOTE that the trap #$15 with dc of 63 shows up as syscall .return. This is an alternate way of entering the trap 15 instruction. See page 5-20 of the CPU32BUG manual.

Format a floppy disk. See the section on formatting disks on page 8. Save the program on your floppy in drive A of the computer by using the DUMP command. See the section on uploading object files on page 9. Call this file lab1pt5.s19. Have your instructor check it. This program adds two extended precision (7 - 32-bit words or 224-bit words). Using breakpoints or trace mode (page 3-9 and page 3-60 in CPU32BUG Debug Monitor User's Manual) follow the program's execution. Observe the register values as you progress. Now set the program counter to $5000 and then execute 5 instructions. Look at the registers. Continue the program to termination by typing just G. Look at the registers and compare to the previous case. In order to determine if these operations update the register memory, change A0 and A1 to all zeros. Set a breakpoint at $5016 and run the program. Look at the registers and compare them to the previous cases. Did the breakpoint routine update the registers? Look at the registers and compare them to the previous cases. Remove the breakpoint, change A0 and A1 to all zeros and run the program by typing G 5000. Compare the registers to all the previous cases. Did the trap instruction update the register memory. Are they the same? If not why not? You MUST execute all of these steps in order. Explain your answer to the instructor.

6. Modify the program generated in part 5 to add two extended precision (8 - 32-bit words or 256-bit words) using the data you have entered above. The added 32-bits are to be at $511C and $513C. Save it on your floppy as lab1pt6.s19. Have your instructor check it. To make sure that the file was saved correctly, Do a block fill on memory locations $5000 to $5020 with $EECE. Then retrieve the program you just saved (lab1pt5.s19) on the floppy drive of the Computer. See the section on downloading object files on page 9. Examine memory (MD) at locations $5000 through $501F to check your results. Make sure the program still works. Have your instructor check it.

1. Reference Material

You will find just about everything you will ever need for this class in the following reference material:

* EECE631 Supplemental Manual * CPU32 Central Processor Unit Reference Manual

* M68332EVK Evaluation Kit User's Manual * CPU32BUG Debug Monitor User's Manual

Before you go ask an instructor a question, check these references to see if they provide an answer for your question.

Do you have your CPU32 Reference Manual with you? Don't come to lab without it!!! Is your name on it?

There are only 7 ICD32 systems in the lab so you will need to work in pairs. You will find an ICD32 In-Circuit Debugger User's Manual at each station with a ICD32. There is a copy of several pages starting on page ?

2. Pseudonym Sheets and Posting Grades

If you will turn to your Syllabus, you will see a form for posting grades. Write down your name and an appropriate pseudonym. The pseudonym cannot be your name, initials, social security number, or anything like that. Turn this form into your instructor before you leave today.

We will keep your grades posted in lab by pseudonym. Check them periodically to be sure you grades are correct. There are several instructors keeping track of grades and occasionally we make a mistake or forget to record something. If you find an error, please tell your lab instructor(s) and keep reminding them until it gets fixed.

3. Laboratory and Key Policies

The lab rules on page 9 are to be followed when using this lab. Read through them so you know what is expected of you.

4. MC68332 Stations

These stations consist of the following:

a) Personal computer with keyboard and screen.

b) System disk containing terminal emulator program and assemblers.

c) M68332EVK Evaluation Kit (EVK)

d) Power supply.

Station Power-up sequence

a) Top power strip controls power to BOTH the work stations below.

• Individual power strips on the center partition which controls power to only one work station.

c) Power supply connector.

d) Power supply switch / Computer and display power switches.

Getting Started

- Once the Computer has been booted you must run Kermit. The defaults are set up for the MC68332 systems. Type C to connect to the MC68332 EVK. Turn on the MC68332 EVK power supply.

- When you power up, you should get the following message (it may be necessary to push the reset button on the MC68332 EVK).

CPU32Bug>

- If your system gets hung, press the reset button on the MC68332EVK. If this does not work press the abort button.

- The Memory Map of the system is given on page 12.

6. Cross Assembly

To avoid assembling your programs by hand, there will be several choices. There is a line by line assembler on the MC68332EVK using the command MM command with the ;DI option. However, with this assembler, you can not get a print out of your source code. There are three cross-assemblers that maybe used in the lab: AS32, IASM32, and ASM68332.

AS32 is a public domain MC68332 cross-assembler which will run on a IBM-type Personal Computer. It is available for downloading from the EECE PC network in the directory Z:\PUBLIC\LENHERT\EE631. This cross assembler has four pages of documentation in the file asm32.doc which do not tell you much. The IASM32 is a commercial product by P&E Microcomputer Systems and comes with the ICD32 debugger. ASM68332 is the commercial assembler that comes with the Tasking C compiler (both the demo version and the commercial version).

• Checkoff

Only parts 3, 4, 5, and 6 need be demonstrated to the instructor to receive credit. Part 4 should be checked off separately from the other parts since it is memory destructive.

PU32BUG Mnemonics

CPU32BUG System Calls

CPU32Diag DIAGNOSTIC FIRMWARE

CrossView Pro Debugger

1. Read section 1.6 in Volume 1 of the CrossView Pro Debugger User's Guide. This debugger is a Windows based debugger so will require that you are in Windows and clicking on the icon. The description of the windows is given on page 23, 60.

2. Work through the material given below. Connect the CrossView Pro Debugger 25-pin D-shell connector to the parallel port of your PC. There are two places to connect the other end of the debugger cable (the 10-pin Berg connector) to the background mode connector. The first is on your MC68332 business card computer (BCC) portion of the EVM and is either an 8 pin (labeled P3) or 10 pin (labeled J7), however the diode protection board covers this up. The second location is labeled BACKGROUND MODE and is to the left of the BCC. It is only an 8 pin connector. Connect the 10-pin connector of the ICD32 such that pin 10 is connected to pin 10 on the 10 pin connector or to pin 8 on the 8 pin connector leaving pins 1 and 2 unconnected. DO NOT CONNECT THE RED WIRE (PIN 1) TO PIN 1 ON AN 8 PIN CONNECTOR.

3. Follow the Crossview Quickstart Guide on page 23, 60 for the following parts. WARNING: If you execute the TRAP #15 instruction you will go into the monitor program and begin execution of it. Put a breakpoint at the TRAP instruction.

.

4. Construct and assemble the program from part 5 of Laboratory 1 using the Assembler of EDE 68332(ASM68332). See Chapter 3 of the Tasking C Compiler/Assembler User's Guide. Note that decimal numbers are the default. To define a word use DC.W as the assembler directive. This is a modification of the program you generated for the 68332 in Lab 1 part 5. Starting at memory location $5000. Using EDE set up a memory window showing $5000-$513f in 32 bit form. Set up a register window with at least D0,A0, A1, and PC.

5. Go thru the following exercises.

a. Load the results from 6 above and have the code window show the dissasembled code. Can you view it in both the memory window and code window.

b. Put a breakpoint at the bne instruction. Execute your program till the breakpoint. Then continue to the breakpoint the next time. Observe the changes in the registers and memory.

c. Single step your program from the break point.

d. Have your instructor check you off on parts a,b,d and d together.

1. Reference Material

You will find just about everything you will ever need for this class in the following reference material:

* EECE631 Supplemental Manual * CPU32 Central Processor Unit Reference Manual

* M68332EVK Evaluation Kit User's Manual * CPU32BUG Debug Monitor User's Manual

Before you go ask an instructor a question, check these references to see if they provide an answer for your question.

Do you have your CPU32 Reference Manual with you? Don't come to lab without it!!! Is your name on it?

There are 14 CrossView Pro Wigglers in the lab so you should work individually. The manuals for the Tasking Software and Hardware is on the shelves in the lab. There are two versions on the software with only a slight difference between them however the manuals have a yellow tag on the older version and a blue tag on the end of the manual.

2. Cross Assembly

To avoid assembling your programs by hand, there will be several choices. There is a line by line assembler on the MC68332EVK using the command MM command with the ;DI option. However, with this assembler, you can not get a print out of your source code. There are three cross-assemblers that maybe used in the lab: AS32, IASM32, and ASM68332.

AS32 is a public domain MC68332 cross-assembler which will run on a IBM-type Personal Computer. It is available for downloading from the EECE PC network in the directory Z:\PUBLIC\LENHERT\EE631. This cross assembler has four pages of documentation in the file asm32.doc which do not tell you much. The IASM32 is a commercial product by P&E Microcomputer Systems and comes with the ICD32 debugger. ASM68332 is the commercial assembler that comes with the Tasking C compiler (both the demo version and the commercial version).

3. Crossview Quick Start Guide

a. Double click on EDE MC68332 icon or click Start, Programs, Internet Tools M68000 Family C Compiler, EDE to start the MC68332 Tasking Embedded Development Enviornment. NOTE: There are two EDEs one for the MC68332 and the other for the Infineon C167 microcontroller.

b. Click on Project New and give it a name. EDE will give the project name a .pjt extension

c. Unless the C source file already exists click the Cancel button on the Project window that comes up.

d. On the Toolbar click File, New and enter the name for the file you are going to enter (or edit) with the .c, .asm or .M68 extension.

e. Save the file. Then under Project click on Properties. Add the file you just composed to the project. Then click OK. Now under Project click on Compile. Note the comments in red in the lower left hand corner. If there are errors then click on Windows, Output on the Toolbar. This will bring up a new window with the errors listed. Edit your file and recompile until you have no errors.

f. Now click on Project, Build. The output window will show you the results. Now you are ready to test the program.

g. If you want to simulate the program first then click on EDE, CrossPro Pro Options and click on Simulator or for this lab click on Background Debug Mode.

4. Checkoff

Only parts 2, 3, 6, and 7 need be demonstrated to the instructor to receive credit.

Write program segments for the following problems. Be prepared to show the flowchart and test conditions when getting the program checked off by the instructor.

1. Move the largest of the unsigned-magnitude long words in D3, D4, and D5 into D0. Start your program at location $3040. Remember that the trap #15 instruction does not update the registers displayed. In order to see the values when the program ended you must use a breakpoint at the termination point of the program since a breakpoint saves the registers in a temporary memory location so the user may view them.

2. Write a program to take the average of a specified number of unsigned word values (16 bits) in memory. The address of the first word is stored in memory location $41F0 as a long word. The number of words to average is stored in memory location $41F4 as a word and the result should be stored in memory location $41F8 as a word. Start your program at $4200

3. Multiply the word in memory location $3FF0 by the word in memory location $3FF2. Then divide the result by the word in memory location $3FF4. Place the quotient as a word in memory location $3FF6 and the remainder as a word in memory location $3FF8. Values in $3FF0, $3FF2, and $3FF4 are twos-complement words whose values are not to be altered by your program segment. If there is an overflow give an indication by setting memory location $3FFE to $FFFF and clear the result in $3FF6 and $3FF8 if there is an overflow. If there is no overflow memory location $3FFE must be $0000. Start your program at $4000

Each problem is worth 7 points. These need to be checked off with the instructor prior to the next lab

* If you haven't turned-in your pseudonym sheet yet, please do so this week.

* Make your programs BULLETPROOF within the given restraints of the program. It is the instructors' job to try and crash your program.

* When you are ready to check-off a program, The instructor wants to see a documented source listing (with assembled code) of your program. We will need to see a flowchart or pseudo-code for all programs.

* Test these programs before you try to have them checked-off. Write down some good test cases. Try them and record your results. The instructors will give you some suggested test cases as the programs become more difficult. They will ask to see your test cases and results as part of the check-off procedure.

* Be sure and tell the instructor of any restrictions or assumptions you have made with a program. These should be written down along with your test cases.

* Tell us if you are using an area of memory for scratch-pad space so we don't use it during testing.

* As you complete a section of the lab, get it checked-off. Don't wait until you have them all finished to do check-off (especially if it is the hour before they are due).

* You should have tested and debugged the programs before you ask an instructor to check them off. Again, these programs are due prior to the BEGINNING of your next lab period. Don't panic - the necessary material will be covered in class before then and most people can finish them only using the lab time. If for some reason you do not get the programs done and checked-off, you can submit a formal program report at the beginning of your next lab period (the SAME lab period mentioned above). Use the format described on page 4 for formal lab write-ups.

* If you have received less than full credit for any portion of a lab assignment and still have time left before the lab is due, you may work on that assignment in order to increase the credit you have received for it. The largest grade for a particular assignment will be the one that gets recorded in the grade book. You need not have the "better" version of the assignment inspected by the same instructor that gave you the initial credit. Go for the points!

1. Using the program you wrote for Lab 3 Problem 2, covert this program to C. Use the C compiler (C68332), linker (LLINK) and formatter (FORM) in the lab or the demo version on the EE net public page (Z:\public\lenhert\ee631). Note that there is a difference between the demo version and the full blown Tasking compiler. It is also available on the lab machines. Obtain the Assembly code from the compiler. Link this code and pass the results thru the formatter to get the S19 output. Download this program, run it and check that the results match your previous results from the assembler program. If not, then do what ever is necessary to the C source file to make it run meeting the same general requirements. Your report should contain the results from the original assembler program and the C program when run over the CPU32Bug EPROM ( $0E0000 through $0FFFFF) and show that they are the same. Check this off with an instructor. NOTE that each of these compilers have different default characteristics for numbers.

2. Repeat Part 1. using the Gnu C compiler (gcc) in the lab or on the EE net public page (Z:\public\lenhert\ee631) . It is also available on the lab machines. Obtain the Assembly code from the compiler. Then compile, link and obtain an s19 file. Download this program, run it and check that the results match your previous results from the assembler program. If not, then do what ever is necessary to the C source file to make it run meeting the same general requirements. Your report should contain the results from the original assembler program and the C program when run over the CPU32Bug EPROM ( $0E0000 through $0FFFFF) and show that they are the same. Check this off with an instructor. NOTE that each of these compilers have different default characteristics for numbers.

3. Compare the differences and similarities of the two compilers with respect to input format, output files, listing file format, ease of use, and how various type declarations are represented. Include this information in your report. No check off is necessary for this part other than turning in the report with the information requested and the C source code for each of the two compilers in electronic form attached to the report or emailed to the instructor. If it is emailed, the file name should be your lastname.lab3pt1.src or lastname.lab3pt2.src.

More information will be handed out in Lab regarding the C68000 and gcc compilers. There is a third C compiler (CC68K) but it is a very limited one and has no linker or assembler associated with it. CC68K is freeware and is available is anyone desires. Only a readme file is available for CC68K which gives no useful information.

Each compiler has different defaults for type declarations. You should determine the size and whether signed or unsigned for the following types: char, int, short, long, unsigned, float, double, and pointer. Before starting to compiler a program for a specific microprocessor, it is many times advisable to write a simple program which will help identify how each of the type declarations are represented. In addition, each compiler has a different method of displaying an assembler-like output and what assembler directives are needed or used. Consequently, each compiler should have an internal or specified assembler that is compatible.

One of the things that traditional software development tools do automatically is to insert startup code. Startup code is a small block of assembly language code that prepares the way for the execution of the software written in a high-level language. Each compiler does something slightly different. This startup code can be changed to match a specific processor environment. The default will typically disable all interrupts, copy any initialized data, zero space for uninitialized data, allocate space for and initialize the stack pointer, enable interrupts, and call "main". After the return from main, some additional code is included for debugging.

Special versions of this startup code is available for many of the microprocessor system. The instructor will attempt to have the startup code for the Tasking and GCC compilers specific for the MC68332 BCC. In any event, it is not necessary for the student to worry about just where main is put as the startup code needs to be run. For the Tasking Compilers (ITOOLS), the last statement in the assembly code (S9 statement) has the beginning address of the program. This allows the immediate execution of the program in the debugger. For the GCC compiler, the beginning address of the program is at $3000.

1. Write a C program to find the largest unsigned byte in a list of numbers. The results of this should be stored in memory location $8000, the number of elements in the list is stored in memory location $8001 and is byte sized (i.e. there are a maximum of 255 number in the list). The list begins at location $8002. If there are no elements in the list return a $00 for the result.

2. Write a C program that takes a byte sized number between 0 and $1F and converts it via a table look-up to a 16-bit number. The input number is stored in memory location $9000 and the result is to be stored in memory location $9002. The table should have the following values:

Input Value Input Value Input Value Input Value Input Value Input Value

$00 $0043 $01 $0044 $02 $004B $03 $005E $04 $0085 $05 $00C0

$06 $011B $07 $019A $08 $0243 $09 $031C $0A $042B $0B $0576

$0C $0703 $0D $08D8 $0E $0AFB $0F $0D72 $10 $1043 $11 $1374

$12 $170B $13 $1B0E $14 $1F83 $15 $2470 $16 $29DB $17 $3000

$18 $3600 $19 $3D4C $1A $44EB $1B $4D36 $1C $5603 $1D $5F88

$1E $69BB $1F $74A2

If the value entered in $9000 is incorrect enter $FFFF as the result in $9002.

3. Write a C program that will input a 16-bit binary word from memory location $A000 and output a variation of the word as indicated below to the same memory location. Set bits 3, 7, 13 and 14 to one, clear bits 0, 2, 5, and 10 and complement bits 4, 8, and 12. The other bits are to be unaffected.

One of the major differences in writing a C program for a microprocessor or embedded system is that the input and output devices are at specific locations in the Memory space. Consequently it is necessary to be able to specify pointers to a specific address of where input and output information are and to be able to specify a pointer to a pointer.

The table lookup is often used in microcontrollers as either a calibration table for an analog input or as the results of a complicated calculation that would take too much time on the microcontroller. Remember that the MC68332 has a table extrapolation function that can allow even fewer points where the function is decomposed into a series of straight lines. We will not try to force the use of this function but just realize that it exists.

With the inputs and outputs of a microprocessor many times being a register of a complicated device, it is often necessary to be able to clear specific bits, set specific bits and complement specific bits without modifying other bits in the memory location.

• Write a C program to convert a binary number to packed BCD of up to 32 bits (can be held in one register). The program should have one input (the number) and one output (the result). The input number has a maximum of 32 bits and is located at $5000. If the output (to be located at $5004) is greater than 32 bits, make the output all ones ($FFFFFFFF). Compile the program, assemble the program, download it into the M68332EVK and run it. Demonstrate that it works to your instructor. Have available the flowchart, the C program, the assembly output of the C compiler, and your test cases with results.



• Write a C program that calculates a series of signed values of the form (A*B)/C where A, B, and C are signed twos complement numbers. The size of the series is in memory location $6000 as an unsigned word. The set of A's is in memory locations starting at $6002, the set of B's start at $6202, the set of C's starts at $6402. The word sized answers start at $6602 with their remainders starting at $6802. The assembly language program has been written in Lab 2 number 4. Use this program and write a C program that calls that as a subprogram. The error indication start at $6A02. Compile the C program, link the results with the assembler program, download it into the M68332EVK and run it. Demonstrate that it works to your instructor. Have available the flowchart, the C program, the assembly output of the C compiler, and your test cases with results. Be prepared to indicate the limits of your program.

• Write a C program that does a bubble sort. We want to sort a list of unsigned numbers (byte) from the smallest to the largest such that the smallest number is at the first address of the list when the program has completed running. The inputs are a pointer to the list (long word) at memory location $7000 and the number of elements in the list as a word in memory location $7004. The data should remain in place. If the number of elements in the list is zero the list should not be altered. Compile the program, assemble the program, download it into the M68332EVK and run it. Demonstrate that it works to your instructor. Have available the flowchart, the C program, the assembly output of the C compiler, and your test cases with results. Be prepared to indicate the limits of your program.

* A packed BCD number is one that each BCD digit takes up 4 bits in the number. That means an 8-bit pack BCD number has a maximum value of 99, with a 16-bit a maximum of 9,999 and a 32-bit number having a maximum of 99,999,999.

* When considering how to convert a number from binary to BCD, one way is to consider the problem as that of a coin dispenser. First you want to dispense the required number of the largest coin by subtracting them from the total until subtracting any more yields a borrow. Then go to the next smaller coin and repeat the process. Repeat this until nothing is left. In this way you get the minimum number of coins. In the case of our problem, that would mean starting with the number of 10,000,000s that could be subtracted watching out for overflow. then continue to the 1,000,000s etc. An alternate (perhaps better) is to use the modulo function in C. If you look at the number modulo 10, the value you get is the least significant digit. Subtracting that from the number allows you to now look at the number modulo 100. Repeat this process until nothing is left or you get an overflow.

* A combination is a selection from a number of things in which the order is disregarded, where as a permutation is a selection in which the order is taken into consideration. For example, if from the letters a, b, and c a group of two is selected, then ab, ac, and bc are the combinations and ab, ba, ac, ca, bc, and cb are the permutations.

* When using a factorial function, you overflow a 32-bit register at a very small number while the number of permutations or combinations is a very small number. It would be better to actually calculate the number using the resulting equation rather than factorials.

* A bubble sort is the scanning of the list element by element in order from the bottom to the top. Each time the previous element is smaller than the current element, the two elements are swapped (do the swap with a function). After n-1 passes through an n element list the smallest element has bubbled to the top. The process is then continued with the remaining n-1 elements. The process could also be done from the top to the bottom swapping if the first element is larger than the second. This will move the largest element to the bottom of the list.

1. LOGIC PROBE

2. INTEGRATED CIRCUIT TESTER

3. LOGIC ANALYZER - Agilent HP1671G

4. MIXED SIGNAL OSCILLOSCOPE - Agilent HP54621 (Oscilloscope)

5. MIXED SIGNAL OSCILLOSCOPE - Agilent HP54621 (Logic Analyzer)

These may be added to or changed at lab time. More information will be supplied at lab time.

• This lab is to give you some practice with the test equipment with which you may debug your projects.

* Work in pairs for check-off. You need not maintain the same partner for all sections of this lab.

* Power-up diagnostic equipment FIRST and turn it off LAST.

• Spend some time working with an instrument. When you feel like you know how it works, an instructor will ask you to show some proficiency with it to get it checked-off.

• We have placed operating manuals next to all of the test instruments for which we have them. Do NOT remove these manuals from lab!!! Anyone caught doing so will receive a zero for this lab and may have their final score dropped a letter grade.

* When using each piece of equipment ask yourself -

1. When and for what purpose is this equipment useful?

2. When and for what purpose is this equipment not appropriate?

1. LOGIC PROBE ($20 to $250)

* It is the simplest test device with minimal (zero) set-up time.

* It can test signals with frequencies up to around 25 MHZ.

* Connect probe to power:

a) Red clip -> +5v

b) Black clip -> GND.

* Test the probe:

a) touch tip to +5v -> red LED lights,

b) touch tip to GND -> green LED lights,

c) the yellow pulse LED should also flash.

* What does it mean when none of the LED's light up?

1) The probe has no power.

2) The probe is dead (broken).

3) The test point is at an invalid logic level:

a) it is three-stated,

b) it is a DC voltage, but is in the undefined (invalid) voltage region, or

c) there is no power at the test point or it is an open circuit.

* Set the two switches as desired:

a) Pulse / Memory (catches short pulses)

b) TTL / CMOS (make sure to set this one).

* The 7 possible outputs are on the chart on the back of the probe.

• This is a passive test instrument. It only watches circuit activity. It cannot (not supposed to) change it.

* The logic probe can only monitor one point at a time.

* It can test both DC and AC signals:

a) DC signals -> one LED is on.

b) AC signals -> the pulse light is on and one or both of the logic level LED's are on (depending on the frequency and duty cycle of the input waveform).

2. INTEGRATED CIRCUIT TESTER ($300)

* Press the Orange button to turn on the power.

• This is an active test instrument. It functionally tests ICs(according to the models you saw in EECE-241).

* Press the TYPE button on tester (top button).

* A type should appear on the display.

* It can test and identify the following devices:

- 7400 series TTL chips

- Some 74LSxx and 74Lxx devices

- 4000 series CMOS chips

- Some dynamic RAMS

* This is very easy to use and it is push-button driven:

- On/Test-

- Type

- Up/Down

- Search (Identify)

* The up down buttons sequences through the ICs that it will test of the given type.

* If you know the chip number, use Test, not Search. Sometimes Search makes mistakes or gives equivalent parts.

* If search does not find the part, it means either that the part is not in the list of testable parts or if it is it is bad.

3. LOGIC ANALYZER - Agilent (HP)1671G (cost $12,500)

• All set-up and input on this logic analyzer is done through a keypad and menu-driven software. There are no switches or knobs.

• The HP 1671G has 102 inputs but can have a personality module which allows the analyzer to do disassembly also. We do not have such a module for the 68332. However the MC68332 Evaluation Platform Board is designed for use with the HP 1670 series Logic Analyzer. The six 20 pin pods at the edge of the Platform board can be connected directly through an adapter connector to the logic analyzer. This connects the full address buss, data bus, chip selects, interrupts and control bus pins. Pod 1 is connected to bits D15 - D0 of the data bus with AS'. Pod 3 is connected to A15 - A0 of the address bus along with DSACK1'. Pod 4 is connected to the remaining address lines (A16 - A23) , the chip selects and several control signals. P5 is connected to control signals including repeating some of the signals on other pins. P6 has the IRQ inputs along with signals for the included peripherals. P2 has the input/outputs connections for the Time Processing Unit (TPU). More information will be provided in class.

* Be sure to power up the Logic Analyzer first!!! The power switch in back on the left side.

* This is another passive instrument.

* Download one of your programs. Then set the system up to display at the beginning of your program. You should then follow your program and watch the bus activity. When you feel comfortable with what is shown and how to use the instrument, have the instructor check you off.

• This is good for diagnosing software, hardware, timing and hardware-software integration with a personality module. Without such a module it is much more difficult to analyze the software and hardware-software integration, but your program and any output can be followed with an assembly listing to show the machine code that is at an address.

4. MIXED SIGNAL OSCILLOSCOPE - HP 54621D ($5K)

• These instruments were donated by Agilent for this lab.

* It is another passive test instrument.

* Power the HP up first and down last!!!

In this portion you will be using only the Oscilloscope portion of the HP54621D. More information will be provided in class.

5. MIXED SIGNAL OSCILLOSCOPE - HP 54621D ($5K)

• These instruments were donated by Agilent for this lab.



• It is another passive test instrument.



• Power the HP up first and down last!!!



• In this portion yo will be using the logic analyzer portion of the HP54621D. More information of this logic analyzer will be provided in class.

Write C programs for the following hardware problems on the 68332 EVK. Be prepared to show the flowchart, the C code, the assembler output and test conditions when getting the program checked off by the instructor. Refer to Harmon, Section 14.6.3 (pp 634-636), MC68332 User's Manual, Section 4.9 (Page 4-69) and Appendix D Sections D.2.9, D.2.10, and D.2.11 (page D-10) and SIM Reference Manual Section 9.

1. Design a C program that inputs 3 bits from the logic switches on the Digidesigner to bits 0-2 of port F of the 68332 and outputs these same three bits on Port F bits 3-5 of the 68332 to the buffered LEDs on the Digidesigner. NOTE: Port F bit 7 is used as Interrupt 7 for the ABORT switch. DO NOT change anything for this bit! Since these pins are also used for interrupting the microprocessor, they have internal pull up resistors so that unconnected pins do not cause an interrupt.

Steps that are required:

SOFTWARE:

a. Initialize the 68332 port F to have bits 0 to 2 as inputs and bits 3-5 as outputs. Do Not Change bits 6 and 7. Use AND and OR to not affect the other bits. Writes may affect them.

b. Set up the Port F Pin Assignment register (PFPAR) so that PF0 thru PF5, and IRQ 6 and IRQ7 are used.

c. Read Port F Data Register (PORTF0). Bits PF0 thru PF2 will be your input, bits PF3 thru PF6 will be the last thing written to those bits in the port.

d. Move bits 0 to 2 to bits 3 thru 5 WITHOUT changing bits 6 and 7 of the input byte.

e. Write the new byte out to Port F Data Register (PORTF0).

f. We suggest that you write this program as a infinite loop so it updates the LEDs whenever you change the switch positions.

HARDWARE:

a: Connect the ground of the MC68332 EVK power supply to the ground of the Digidesigner.

b. Connect the I/O cable as follows: The 20 pin socket connector to the 68332 Logic Analyzer Connectors Pod 6 and the 24 pin DIP in the breadboard area of the Digidesigner.

c. Connect pins 4, 5, and 6 to the right 3 logic switches on the Digidesigner with bit 6 the left most of the three logic switches. (These are labeled MODCLOCK, IRQ1, and IRQ2 on the EVK.)

d. Connect pins 7, 8, and 9 to the right 3 LEDs on the Digidesigner with bit 9 the left most of the three LEDs. (These are labeled IRQ 3, IRQ4, and IRQ5 on the EVK.)

2. Connect up the Serial to Parallel Shift register 74HC594 (data sheet on page 76) on the auxiliary board (schematic on page 83) to be used as a digital output. Connect the outputs QA, QB, QC and QD to the LEDS on the Digidesigner. Connect up the Parallel to Serial Shift register 74HC166 (data sheet on page 79) on the auxiliary board to be used as a digital input. Connect the inputs A, B, C, and D to the slide switches on the Digidesigner with A being the left most light. Specifics of the needed program will be given in class.

1. Remember that Port F pins are defaulted at power up and reset as interrupts for the microprocessor, consequently they have internal pull up resistors so that unconnected pins do not cause an interrupt. Also remember Port F bit 7 is used as Interrupt 7 for the ABORT switch. DO NOT change anything for this bit in your program!

2. When not transferring 16 bits to the Receive Data RAM or from the Transmit Data RAM it is IMPORTANT to realize where the data goes. Referring to the QSM Reference Manual on page 4-13 Section 4.3.6.1 Receive Data RAM. "Data stored in receive RAM is right-justified, i.e., the least significant bit is always in the right-most bit position within the word (bit 0) regardless of the serial transfer length." This defines where the data that you bring in from the slide switches will be. Be sure and set up a pattern that you can recognize. What got brought in from the unconnected inputs?

3. Also referring to the QSM Reference Manual on page 4-14 Section 4.3.6.2 Transmit Data RAM. " Information to be transmitted by the QSPI should be written by the CPU to the transmit data segment in a right-justified manner." This defines where the data that you want to send out should be. Note that there will be something (either a zero or one) in all the other bits that are sent out so you should make sure that the pattern you send out is such that it can be discerned from the unused data. Note that you can always use the logic probe to see what is on the other pins. A possible program would be to input from the switches and output to the lights.

Write C programs for the following hardware problem on the 68332 EVK. Be prepared to show the flowchart, the C code, the assembler output and test conditions when getting the program checked off by the instructor. Refer to Harmon, Sections 12.1 (pp 420-429) and 12.4 (pp 463-492) and MC68332 User's Manual Section 5 (Pages 5.1-5.5.5.3 ) and Appendix C. Review QSM Reference Manual Appendix A and its program. Work in pairs.

1. Write a C program to input at least three data channels from the Analog-to Digital Converter (MC145051 data sheet on page 70) auxiliary board (Schematic on page 84). This should be written to input the data and save, wait a period of time get another set of data and save repeating this for a fixed number of times (16 or 256) and average. You may do this on all channels if desired. Connect the channels up to 5 volts, ground and an intermediate voltage obtained by a resistive voltage divider or potentiometer.

Steps that are required:

SOFTWARE:

a. Disable the QSPI.

b. Clear flags in SPSR.

c. Set up port bits for the QSPI.

d. Initialize the control parameters in SPCR0, SPCR1, and SPCR3.

e. Initialize the Transmit RAM.

f. Initialize the Control RAM.

. g. Enable QSPI

h. Send out control info and discard first data received

i. Wait and get data when next control info sent out.

• Increment time counter ( or wait for completion)

• Save result and repeat steps I, j and k for a fixed number of times.
• Average your result, save in a location not affected by reset and quit.

HARDWARE:

a: Plug in the Auxiliary board into the empty board location of the MC68332 EVK.

b. The Auxiliary board automatically connects the MC145051s SCLK to PQS2/SCK, Din to PSQ1/MOSI, Dout to PSQ0/MISO and CS' to PCS1 of the MC68332 EVK.

c. Connect the I/O cable as follows: The 20 pin socket connector to the connector on the auxiliary board with pin 1 being on the top right and pin 20 being to the lower left. The channels are connected as follows:

A/D Channel Pin No. A/D Channel Pin No. A/D Channel Pin No.

0 2 1 1 2 4

3 3 4 6 5 5

6 8 7 7 8 10

9 9 10 12

d. Connect the ADC channels you used to the logic switches, pushbutton and a resistive voltage divider..

2. Write a C program to output a data channel from the Digital-to-Analog Converter (MC144110 data sheet on page 66) on the auxiliary board (schematic on page 84). This should be written to output the data from a fixed length table, wait a period of time and then output the next piece of data. When the end is reached start over. Connect the channel up to the oscilloscope.

Steps that are required:

SOFTWARE:

a. Disable the QSPI.

b. Clear flags in SPSR.

c. Set up port bits for the QSPI.

d. Initialize the control parameters in SPCR0, SPCR1, and SPCR3.

e. Initialize the Transmit RAM.

f. Initialize the Control RAM.

. g. Enable QSPI

• Send out control info and first data

i. Increment data counter

• Wait and repeat steps h, i, and j.

HARDWARE:

a. Plug in the Auxiliary board into the empty board location of the MC68332 EVK.

b. The Auxiliary board automatically connects the MC144110s CLK to PQS2/SCK, Din to PSQ1/MOSI, and ENB' to PCS2 of the MC68332 EVK.

c. Connect the I/O cable as follows: The 20 pin socket connector to the connector on the auxiliary board with pin 1 being on the top right and pin 20 being to the lower left. The channels are connected as follows:

D/A Channel Pin No. D/A Channel Pin No. D/A Channel Pin No.

1 13 2 14 3 15

4 16 5 17 6 18

d. Connect the oscilloscope to the D/A channel you are using.

1. Remember from the last experiment! When not transferring 16 bits to the Receive Data RAM or from the Transmit Data RAM it is IMPORTANT to realize where the data goes. Referring to the QSM Reference Manual on page 4-13 Section 4.3.6.1 Receive Data RAM. "Data stored in receive RAM is right-justified, i.e., the least significant bit is always in the right-most bit position within the word (bit 0) regardless of the serial transfer length." Also referring to the QSM Reference Manual on page 4-14 Section 4.3.6.2 Transmit Data RAM. " Information to be transmitted by the QSPI should be written by the CPU to the transmit data segment in a right-justified manner."

Write C programs for the following hardware problems on the 68332 EVK. Be prepared to show the flowchart, the C code, the assembler output and test conditions when getting the program checked off by the instructor. Refer to Harmon, Section 13.2 (pp 515-524) and TPU Reference Manual, Chapter 2 (Pages 2.1-2.22 ) and Appendix A Section A.10 for the first problem. Refer to Harmon, Section 13.5 (pp 546-550) and TPU Reference Manual, Chapter 2 (Pages 2.1-2.22 ) and Appendix A Section A.11 for the second problem. Read MC68332 User's Manual Section 8.8 for the procedure to set up the TPU Configuration

1. Design a C program to generate a pulse width modulated (PWM) signal with a period of 1 ms and a duty cycle starting at 0.1 and going to 0.9 in steps of 0.01. Be sure and wait at least 20 ms between changes so that these changes can be seen on an oscilloscope. Refer to Section 3.2.1 Example 1 in the M68332EVK Evaluation Kit Exercise Manual.

Steps that are required:

SOFTWARE:

a. Initialize the TPU following the procedure handed out in class. Be sure and use AND and ORs to change values in registers that affect more than one channel!!

b. The value for PWMHI should be 10% of PWMPER.

c. Wait at least 0.5 seconds and then change PWMHI by 1%.

d. Repeat part c until PWMHI reaches 90% of PWMPER. Then go to part b and repeat.

HARDWARE:

a: Connect the ground of the MC68332 EVK power supply to the ground of the Digidesigner.

b. Connect the I/O cable as follows: The 20 pin socket connector to the 68332 Logic Analyzer Connectors Pod2 and the 24 pin DIP in the breadboard area of the Digidesigner.

c. Connect the TPU channel you used to an oscilloscope and set the scope to see the stable pulse and watch it change.

2. Design a C program to generate a square wave of 1KHz on Channel 5 of the TPU and measure the time that the waveform is high using Channel 6 of the TPU. Refer to Section 3.2.3.1 Example 5 in the M68332EVK Evaluation Kit Exercise Manual.

Steps that are required:

SOFTWARE:

a. Initialize the TPU following the procedure handed out in class. Be sure and use AND and ORs to change values in registers that affect more than one channel!!

b. Using a portion of the software from part 1 generate a square wave of 1 KHz.

c. Once Channel 5 is working, then program the TPU to measure the high time.

d. Set up TPU to average this over a fixed number and then quit.

e. Leave the result in a register or fixed memory location unaffected by reset.

HARDWARE:

a: Connect the ground of the MC68332 EVK power supply to the ground of the Digidesigner.

b. Connect the I/O cable as follows: The 20 pin socket connector to the 68332 Logic Analyzer Connectors Pod2 and the 24 pin DIP in the breadboard area of the Digidesigner.

c. Connect the TPU channel 5 to an oscilloscope and tie TP5 to TP6.

* Bring the MC68332 User's Manual to Lab. Read Section 8 paying special attention to Figures 8-2, Figure 8-3 (Where the base address of the TPU on the MC68332 EVK is $FFFE00 - i.e. Y-1111), Section 8.8 (IMPORTANT), Section 8.9.4.1 and Section 8.9.9.

* Bring the TPU Time Processor Manual to Lab. Read Section 2. In Appendix A pay particular attention to Sections A.1 (we have mask set A), A.3, A.4 and A.11.

* There are TPU programming notes in the lab for more information. You may get your own copy from the web DO NOT REMOVE FROM THE LAB!!! (http://e-www.motorola.com/brdata/PDFDB/docs/TPUPN17.pdf or TPUPN11.pdf).

To initialize the TPU using Section 8.8 in the 332 User's Manual the following things need to be done:

1) Configure the Module configuration Register ($FFFE00). To do this you must know what you want for the timer prescalar values. This means that you must determine the maximum and minimum values that will be seen so that you don't have too small a value or too large a value. Additionally you must determine the value for 10 bits. Remember the safe state for something you are not using is the reset condition. The MC68332 clock rate is 16.777 MHZ. The divide by 32 timer prescaler yields a period of 1.92 microseconds while the divide by 4 prescaler gives a period of 0.238 microseconds.

2) Disable the channels to be used by putting the priority to $00

3) The channel interrupt configuration and interrupt enable registers must be initialized. Since we do not want to use interrupts they can be left in their reset condition.

4) The channel function select register must be written to chose the time function (PPWA). First you must decide on the channel and then put in the function code from TPU Table A-1 at the address specified for the channel chosen.

5) The host sequence register now must be written for the accumulation that is to be done.

6) The parameter RAM for problem 1 (ITC) has 3 parameters that need to be loaded. The first is parameter 1 containing the CHANNEL_CONTROL information. The second parameter is the link information which is not used so is not written to. The third parameter is MAX_COUNT ( the number of times to count before the channel is finished). To count bounces we should put it at the maximum.

7) The parameter RAM for problem 2 (PWM) has 3 parameters that need to be loaded. The first is parameter 1 containing the CHANNEL_CONTROL information. The second parameter is PWMHI ( the count value of the TPU clock used defining the HIGH time). The third parameter is PWMPER ( the count value of the TPU clock used defining the period).

8) The Host service bits must be written to initialize the channel.

9) The channel priority is usually written last to enable each channel by assigning the priority.

10) The host service request register should be monitored for completion of initialization.

MC68332 MC68HC11

DATA MOVEMENT

MOVE MOVEA LDAA LDAB LDD LDS LDX LDY TAB

MOVEQ STAA STAB STD STS STX STY TBA

MOVE USP PSHA PSHB PSHX PSHY

PULA PULB PULX PULY

MOVE to CCR TAP TPA

MOVE to SR

MOVE from SR TSX TSY

MOVE from CCR TXS TYS

EXG XGDX XGDY

MOVEM MOVEC

MOVEP MOVES

LEA PEA

SWAP

DATA MANIPULATION

ARITHMETIC

ADD ADDA ADDA ADDB ADDD

ADDQ ADDI ABA ABX ABY

ADDX ADCA ADCB

SUB SUBA SUBA SUBB SUBD SBA

SUBQ SUBI

SUBX SBCA SBCB

ADDQ INCA INCB INC INS INX INY

SUBQ DECA DECB DEC DES DEX DEY

NEG NEGX NEGA NEGB NEG

MULU MULS MUL

DIVU DIVS FDIV IDIV

DIVUL DIVSL

ABCD DAA

SBCD NBCD

EXT EXTB

LOGICAL

AND ANDI ANDA ANDB

OR ORI ORAA ORAB

EOR EORI EORA EORB

EOR CCR EOR SR

BSET BCLR BCLR BSET

BTST BCHG

ASL ASLA ASLB ASLD ASL

ASR ASRA ASRB ASR

LSL LSLA LSLB LSLD LSL

LSR LSRA LSRB LSRD LSR

ROL ROLA ROLB ROL

ROR RORA RORB ROR

ROXL

RORL

CLR CLRA CLRB CLR

NOT COMA COMB COM

PROGRAM MANIPULATION (JUMP AND BRANCH)

JMP JSR JMP JSR

RTS RTR RTS

RTD

RTE RTI

BSR BSR

BRA BRA BRN

BRCLR BRSET

BCC BCS BCC BCS

BNE BEQ BNE BEQ

BPL BMI BPL BMI

BVC BVS BVC BVS

BGE BLT BGE BLT

BGT BLE BGT BLE

BHI BLS BHI BLS

BCC(HS)BCS(LO) HS BLO

TRAP TRAPV SWI

TRAPcc

ILLEGAL

PROGRAM STATUS (CONDITION CODE)

CMP CMPA CMPA CMPB CBA

CMPI CMPM CPD CPX CPY

CMP2

BITA BITB

TST TSTA TSTB TST

TAS

MOVE CCR ANDI CCR CLC CLI CLV

ANDI SR

MOVE CCR ORI CCR SEC SEI SEV

MOVE SR

MISCELLANEOUS

NOP NOP

STOP STOP

LPSTOP

TEST

WAI

RESET

CHK CHK2

DBcc

Scc

TBLS TBLSN

TBLU TBLUN

BGND BKPT

LINK UNLINK

BKPT

There are four assemblers available in the lab and each has its own characteristics and notation.

1) The CPU32BUG assembler as used in Lab experiment 1 only requires the memory modify command with the extension ;di. However you cannot get a print out of the source listing.

2) The AS32 assembler is freeware from Motorola and follows the normal Motorola assembler notation. To invoke this assembler and get a listing file the command is:

as32 filename.asm > filename.lis

3) The IASM32 assembler was written by P&E Micro. To invoke this assembler and get a listing file the command is:

iasm32 filename.asm(optional)

Now use the function keys to load the program(if needed), assemble the program and obtain a listing file. Remember to use the menu key and the assemble section to specify the files you want out.

4) The ASM68332 assembler was written for the gnu compiler and is freeware. To invoke this assembler and get a listing file the command is:

asm68332 filename.asm -l filename.lis

FUNCTION CPU32BUG AS32 IASM32 ASM68332

Numbers Prefixes Prefixes prefix suffix prefix suffix

Hexadecimal $ $ $ H$H

Decimal & digit ! Tdigit

Octal @ @ @ O@Q

Binary % % % Q%B

ASCII String ' ' ' ' ' ' both'' both

Default Base Hexadecimal Decimal Hexadecimal Decimal

Default size

(no extension) Word

Symbols not allowed

Starting Character [a-z][A-Z]_ [a-z][A-Z] [a-z][A-Z]_.

Other Characters [a-z][A-Z]_[0-9]$ [a-z][A-Z]_[0-9] [a-z][A-Z]_[0-9]$.?

Maximum Length 30 Characters 16 Characters 30 Characters

Label not allowed

Ending character : (optional) : (optional) : (optional)

Starting & other Same as symbol Same as symbol Same as symbol

Separating Characters space . / - space, tab space or space or tab

: after label

Mnemonics Shortened Shortened

First Col to start in 1 1 Not col 1

Operands

Multiply * * * *

Divide / / / /

Add + + + +

Subtract - - - -

Negation - -

Left Shift << < <<

Right Shift >> > >>

Remainder after division % % %

Bitwise AND & & & &

Bitwise OR | | !

Bitwise XOR ^ ^

Bitwise NOT ~

Current PC value * * $ *

FUNCTION CPU32BUG AS32 IASM32 ASM68332

Comments NONE

Line comment(col 1) * or Blank Line * ; * or Blank Line

Elsewhere (Starts with) After Operands ; After operands separated

by space, tab or ;

Pseudo Op-Codes

Define storage ds rmb or ds ds

Define Byte Storage DC.B fcb or db DC.B

Define Word Storage dc.W dc.W fdb or dw DC.W

Equates equ equ equ

Origin org org org

Check for Instr. Byte Align even

Listing opt list .list (Col 1) list or OPT L

No Listing opt nolist .nolist (Col 1) nolist or OPT NOL

Force forward refs long opt brl OPT BRL

Include a file include '^' $include '^' include <file>

(see directives)

Trap #$F SYSCALL

Assembler Directives NONE ^ indicates argument

Special Starting Char Col 1 / # $ _ NONE

Change Default no. base BASE ^

Conditional Assembly IF ^ IFxx

IFNOT ^

ELSEIF ELSEC

ENDIF ENDC

Repeat code REPEATC <expr1>[,<expr2>]

ENDR

Set Specified Condition True SET ^ SET

Set Specified Condition False SETNOT ^

Macros NONE NONE MACRO ^ <label> MACRO

MACROEND ENDM

Listing Directives NO LISTING See Pseudo ops

Special Beginning Char . In Col 1

Cause a new page eject or page page

Put a header on each page header '^' TTL

Page Length pagelength ^

Page Width pagewidth ^

Put a new header subheader '^' STTL

CC68K

This is a freeware compiler and is very limited. It is located in the directory C:\MC68332 and is called by:

cc68k filename.c

There is no linker so the assembly language will require an ORG statement and some miscellaneous statements removed.

C68332

There are two versions of the Tasking compiler. The first is a limited version of Tasking (formerly Intermetrics) that came with a previous textbook. The second is a full blown C/C++ compiler. They are both located in the directory C:\itools\x. We only have 7 copies of the full blown compiler. These are where the CrossView Pro Debuggers are and are a window's based program and have icons on the screen when in windows.

The compiler options are given on page 41

The compiler options can also be viewed by just typing

c68332

The limited version is a DOS version and is called by:

c68332 filename.c -no -nf -p -l filename.LIS

This turns off the optimizer, outputs a file called "filename.LIS", and gives a pseudo assembly listing in the narrow format.

This compiler has a linker located in the same directory for the 68332 and is invoked by

llink filename.ol -L c:\itools\lib\lib332 -c c:\itools\lib\332bcc.cmd -o -- Limited version - DOS call

llink filename.ol -L c:\itools\rtlibs\lib020s\lib\lib332 -c c:\itools\rtlibs\lib020s\lib\332bcc.cmd -o -- Tasking machines

This command tells it where the 68332 libraries are as well as where to put the code for the 68332 BCC (i.e. starting at $3000) and generated a file filename.ab. To generate a hex (s19) format to download type

form filename.ab -o filename.hex

The lab systems have a batch file called itools.bat that will take a single C file compile it, link it and format it. The call is:

itools.bat filename

It will generate a listing file (filename.lis), a link input file (filename.ol), a link output file (filename.ab), and an s19 output file (filename.hex) for downloading. Be sure and note that the input file does not have the extension .c in the batch file call, but must be of the form filename.c.

Note: The Compiler puts some code before your code to initialize everything. The last line in the filename.hex s903xxxxyy gives the starting address (the xxxx) and it loads that into the PC. It ends with a branch to $3000 which is a branch to itself and requires a reset to get back to CPU32BUG. You may want to replace their branch to $3000 with a TRAP #$F to get to CPU32BUG directly. DO NOT DO THIS AT $3000 as the compiler has code starting at $3002.

GCC

This is a standard gcc adapted for the MC68332. It is located in the directory c:\xgcc and is called by:

gcc -mcpu32 -Wl,-Tbcc.ld,-M -Wa,-a -o filename.s19 filename.c -lc -lbcc -lg

This will generate an s19 file that can be downloaded directly to the MC68332 starting at address $3000. Most compilers put extra assembly language statements before the first line of your program.

The lab systems have a batch file called GC.bat that will take a single C file compile it, link it and format it. The call is:

GC.bat filename

It will generate a listing file (filename.lis), a link input file (filename.ol), a link output file (filename.ab), and an s19 output file (filename.hex) for downloading. Be sure and note that the input file does not have the extension .c in the batch file call, but must be of the form filename.c.

The options for the gcc compiler are given on page 43 or may be viewed by typing:

68k-gcc -help NOTE: There are two dashes before help.

There is a unix version on fang in \usr\local\motorola a similar call sequence is needed without the -lc -lgcc -lbcc.

You first create a C program with a standard ASCII-based text editor. This program must have the extension .C (for example filename.C). The cross-compiler is C68332. If you enter the command C68332 with no parameters, the cross-compiler will give you a list of the compiler options and their meanings.

You cross-compile a program called filename.C by executing the DOS command:

C68332 filename.c -no -nf -l filename.lis

where:

filename.c is the name of the source file

-no is an option that suppresses compiler optimization

-nf gives a pseudo assembly listing in a narrow format

-l filename.lis gives you a listing file

This assumes that your source file is in the same directory as C68332.EXE.

The cross-compiler produces a listing file called filename.lis. This listing file can be read to analyze the operation of the compiler.

Example:

If the source file is called SWITCH1.C and contains:

char get_grade(int mark)

{

char grade;

switch (mark/20)

{

case 0: grade = 'E'; break;

case 1: grade = 'D'; break;

case 2: grade = 'F'; break;

}

return (grade);

}

void main (void)

{

int result = 22;

char letter;

letter = get_grade(result);

}

The listing file is as follows:

* Feb 16 2000 18:50:01

* bc sid : @(#)bc68000.PL 5.147.1.1

* options : -no -p -p -l switch1.lis -t 68332 -nv

* cpf sid : @(#)cpf.PL 6.86.1.1

*1 char get_grade(int mark)

SECTION S_get_grade,,"code"

* Parameter mark is at 8(A6)

* Variable grade is at -1(A6)

XDEF _get_grade

_get_grade

LINK A6,#-2 4e56fffe .loc 000000

__P1 EQU $000004

*2 {

*3 char grade;

*4 switch (mark/20)

BRA L1 6000____ .loc 000000 + __P1

L2

*5 {

*6 case 0: grade = 'E'; break;

MOVE.B #69,-1(A6) 1d7c0045ffff .loc 000004 + __P1

BRA L3 6000____ .loc 00000a + __P1

L4

*7 case 1: grade = 'D'; break;

MOVE.B #68,-1(A6) 1d7c0044ffff .loc 00000e + __P1

BRA L3 6000____ .loc 000014 + __P1

L5

*8 case 2: grade = 'F'; break;

MOVE.B #70,-1(A6) 1d7c0046ffff .loc 000018 + __P1

*9 }

BRA L3 6000____ .loc 00001e + __P1

L1

*(see line 4)

MOVE 8(A6),D1 322e0008 .loc 000022 + __P1

EXT.L D1 48c1 .loc 000026 + __P1

DIVS #20,D1 83fc0014 .loc 000028 + __P1

BEQ.S L2 67d6 .loc 00002c + __P1

SUBQ #1,D1 5341 .loc 00002e + __P1

BEQ.S L4 67dc .loc 000030 + __P1

SUBQ #1,D1 5341 .loc 000032 + __P1

BEQ.S L5 67e2 .loc 000034 + __P1

L3

*10 return (grade);

MOVE.B -1(A6),D0 102effff .loc 000036 + __P1

*11 }

UNLK A6 4e5e .loc 00003e

RTS 4e75 .loc 000040

* Function size = 66

*12

*13 void main (void)

XREF __main

* Variable result is at -2(A6)

* Variable letter is at -3(A6)

XDEF _main

_main

LINK A6,#-4 4e56fffc .loc 000042

__P2 EQU $000046

*14 {

*15 int result = 22;

MOVE #22,-2(A6) 3d7c0016fffe .loc 000000 + __P2

*16 char letter;

*17 letter = get_grade(result);

MOVE #22,-(A7) 3f3c0016 .loc 000006 + __P2

JSR _get_grade 4eb9________ .loc 00000a + __P2

MOVE.B D0,-3(A6) 1d40fffd .loc 000010 + __P2

*18 }

UNLK A6 4e5e .loc 00005a

RTS 4e75 .loc 00005c

* Function size = 28

* bytes of code = 94

* bytes of idata = 0

* bytes of udata = 0

* bytes of sdata = 0

_dgroup data

END

function: compile one or more C programs

usage: c68332 prog.c [prog2.c ...] [options]

Options Summary

Listing Options

-a expanded source listing, including #include files

-i interleaved (pseudo-)assembly listing

-l put all listings in optional list file name, e.g. -l filename

-nf narrow format pseudo-assembly listing

-p pseudo-assembly listing

-q real-assembly listing

-q -i interlisted real-assembly listing

-s basic source listing

-x cross-reference listing

Include Options

-I specifies user include directories, e.g. -I dir1 [dir2 ...]

-S specifies system include directories, e.g. -S dir1 [dir2 ...]

Datatype Options

-ab align all structures with bitfields to word alignment

-bb use 16-bit word aligned packing for all bitfields

-D redefine data types, e.g. -D i4s (see manual for more details)

-L shorthand for -D i4s s2s, (int=32 bits, short=16 bits)

-pack 1 use byte alignment of words in structures

-pack 2 use word alignment of words in structures (the default for 68000, 68010, 68302, 68332, and 68340)

-pack 4 use fullword alignment of fullword data (the default for 68020, 68030, 68040, 68ec030, 68ec040, and 68360)

-rl use right-to-left (old style) bitfield ordering

Separate Data Options

-cs put const declared variables in separate segment cdata

-sc specify default class for separate data items, e.g. -sc defclass

-sd put all global data in separate segments

-ss specify default segment for separate data items, e.g. -ss defseg

Optimization Options

-ai enable automatic inline expansion for static procedures (may not be combined with -d)

-do disable optimizations that interfere with debugging combines -nd, -nh, -nl, -np and -nr

-nal no aliasing - assume pointed to and named objects are distinct

-nd do not delete dead assignments

-nh do not hoist code out of loops

-nl preserve LINK instructions

-no skip the optimizer

-np pack only one variable per register

-nr do not strength-reduce loops

-nv assume globals are not volatile unless marked (default)

-os optimize for space at expense of time

-ot optimize for time at expense of space (not quite the default)

-sp do not promote float/double variables to extended precision (ignored unless -h also specified: decreases performance)

-vv assume all globals are volatile (decreases performance)

Miscellaneous Options

-ao pass options to assembler, e.g. -ao "-l -I inc1" Options must be in quotes if there's more than one given. Use only with -ia.

-ar use alternate register conventions

-ca finish compiling even though -E or -M is present

-d emit symbolic debug records, e.g., for xdb

-dd allow ANSI-style duplicate definitions (warning: causes global variables to be reordered)

-E leave the preprocessor output in corresponding file suffixed ".pp", e.g. -E filename NOTE: only continues compilation if -ca is present

-e warn if language extensions are used

-err redirect error messages to optional error_file, e.g. -err filename

-err+ same as -err, but append to optional error_file, e.g. -err+ filename

-ia use assembler to generate object module output (required if C source contains inline assembly code)

-k use a single name space for structure fields

-M list make-style include dependencies, e.g. -M filename NOTE: only continues compilation if -ca is present

-m use hardware float instructions for all math functions (ignored unless -h is also supplied)

-mp build header file of ANSI-style function prototypes in <file>.ah

-na disable ANSI C extensions

-o put object module in specified file, e.g. -o filename

-P predefine string for preprocessor, e.g. -P "string[=value]"

-pw emit warnings for calls to undeclared functions

-w suppress warning messages -- optional argument is warning level, e.g. -w [level]

-0 internal flag for debugging - identifies executables

Code Generation Options

-aa align each procedure on a 16-byte boundary (helps cache on 68040)

-ac align code segment on a 16-byte boundary (like -aa, but cheaper)

-b5 use 32-bit offsets for A5-relative data (warning: causes much less efficient code)

-68 use software floats linkage conventions. Use only with -h. (warning: not compatible with double library functions)

-C maintain compatibility with old run time model

-cc set class name for code segment, e.g. -cc code_class

-h use 68881/68882 hardware floating point instructions

-id assume distinct code/data address spaces (only matters with -pd)

-ih assume routines called by interrupt handlers do not use floating point arithmetic (only matters with -h)

-j generate short branches for forwards branches

-n5 do not reserve the A5 register for global data NOTE: this requires a special no-A5 run time library

-n6 do not reserve the A6 register for the frame pointer

-n7 N do not postpone more than N bytes of stack fixup

-pc use PC-relative calls (BSR.L or equivalent if not available)

-pd use PC-relative addressing for separate data

-ps use short PC-relative references (BSR.W and d16(PC)) NOTE: requires all code, string literals, and, if -pd is present, separate data, total less than 32K bytes

-si allocate string literals in the idata segment

Driver Options

-cf continue processing even if a phase fails

-ke run phases sequentially, keep intermediate files

-opfile supply command line options in a file, e.g. -opfile file

-pf pass unknown flags without complaint

-se run phases sequentially (not in a pipe)

-v verbose mode

-V very verbose mode

The following override the locations of executables: (the filename should include the full path)

-as specifies a different assembler, e.g. -as filename (only applies if -ia is also supplied)

-be specifies a different back end, e.g. -be filename

-fe specifies a different front end, e.g. -fe filename

-in specifies a different interl utility, e.g. -in filename

-me specifies a different merge utility, e.g. -me filename

-op specifies a different optimizer, e.g. -op filename

-xd specifies a different directory for executables, e.g. -xd directory

-xr specifies a different cross-reference utility, e.g. -xr filename

(See reference manual for more details.)

Usage: 68k-gcc.exe [options] file...

Options:

--help Display this information

(Use '-v --help' to display command line options of sub-processes)

-dumpspecs Display all of the built in spec strings

-dumpversion Display the version of the compiler

-dumpmachine Display the compiler's target processor

-print-search-dirs Display the directories in the compiler's search path

-print-libgcc-file-name Display the name of the compiler's companion library

-print-file-name=<lib> Display the full path to library <lib>

-print-prog-name=<prog> Display the full path to compiler component <prog>

-print-multi-directory Display the root directory for versions of libgcc

-print-multi-lib Display the mapping between command line options and multiple library search directories

-Wa,<options> Pass comma-separated <options> on to the assembler

-Wp,<options> Pass comma-separated <options> on to the preprocessor

-Wl,<options> Pass comma-separated <options> on to the linker

-Xlinker <arg> Pass <arg> on to the linker

-save-temps Do not delete intermediate files

-pipe Use pipes rather than intermediate files

-specs=<file> Override builtin specs with the contents of <file>

-B <directory> Add <directory> to the compiler's search paths

-b <machine> Run gcc for target <machine>, if installed

-V <version> Run gcc version number <version>, if installed

-v Display the programs invoked by the compiler

-E Preprocess only; do not compile, assemble or link

-S Compile only; do not assemble or link

-c Compile and assemble, but do not link

-o <file> Place the output into <file>

-x <language> Specify the language of the following input files

Permissible languages include: c, c++, assembler, none. 'none' means revert to the default behavior of guessing the language based on the file's extension

Options starting with -g, -f, -m, -O or -W are automatically passed on to the various sub-processes invoked by 68k-gcc.exe. In order to pass other options on to these processes the -W<letter> options must be used.

1. Use pencil! It is almost impossible to draw the timing diagrams correctly the first time.

2. The number of equations which you must write and solve is equal to the number of parameters specified by the memory or peripheral device.

3. Each equation must have exactly one memory or peripheral parameter.

4. Minimize the number of microprocessor clock parameters. Beware of minimum and maximum values in a clock cycle specification (except T_Crf). (MC68332 User's Manual, MC68332UM/AD REV 1, Figure A-1)

e.g., Tcyc(min) 2T_CW(min)+ 2T_Crf(min)

5. The device (either memory/peripheral or microprocessor) receiving a signal makes demands thereon.

6. When a value is required (e.g., max), but is unspecified, try moving into an adjacent access cycle to define the value.

7. Use a "rubber ruler". Don't worry that the same time delay is 1" long in one place and 1/4" long in another. Let the numbers form the numeric interrelationships. Try to get the ordering of signals correct. Don't worry if you don't. The numeric values should correct for any "strange" drawings.

8. Don't try to do both read timings and write timings on the same timing sheet. There is a good chance of getting the signals all mixed up.

9. This paper is concerned with memory timings. It may also be used for peripheral timings.

10. Under NO circumstances should any of your equations use f(max), or Tcyc(min) except when using an 16.67 MHz system clock. If the frequency is fixed, then Tcyc is fixed.

11. You will need at least three sources of timing parameters: manufacturer's data sheets for the microprocessor, memory (or peripheral) data sheets, and the appropriate CMOS data book (for the combinational decoding and buffering devices). To simplify the combinational timing problem, it may be convenient to use a single timing delay for each device independent of the logic level or logic level change. To do this use the "worst-case" timing value as found for a particular part in the CMOS data book.

12. Motorola-type16/32-bit devices usually use the chip select input signal from which to strobe or provide data. The sample diagrams provided herein cover the MC68332-KM62256CLP interface. The KM62256CLP data write manipulation is controlled by the chip-select signal (CS') and/or by the read/write signal (WE'). It is impossible to tell which of the two signals are controlling the setup time or which of the two signals are controlling the data hold time (they may be different). Consequently it is necessary to investigate each of the two cases on each edge. Intel-type devices usually use a separate read-strobe and write-strobe. To connect these devices to a Motorola-type processor usually means treating these strobes (at least from a timing perspective) as we would normally treat the chip-selects on Motorola-type devices. (Yes, this sounds confusing! Did you expect more from anything with regard to timing? Talk to the instructor for a clarification!)

GENERAL ANALYSIS PROCEDURE

1. Start with a design that meets all DC requirements of the system. Fan out capabilities should be observed. Logic level polarity (especially on control signals such as chip-selects, chip-enables, output-enables and read/write control) must be properly designed. This analysis will assume that the internal chip select is setup properly and used. This includes the proper number of wait states.

2. Construct the hardware block diagram for the system under analysis. Consider "blocks" as major components (microprocessor and memory or peripheral) and combinational logic (buffers, decoders, etc.). The block diagram should indicate families of signals (e.g. address bus and data bus) as well as control signals (e.g. WE', CS' ,OE' and CLK (not shown)). (See Figure 2). The combinational logic between the microprocessor and memory is shown as a block with a single time delay as mentioned in 11 above.

3. The analysis procedure for read/write devices will be performed in two steps. The first is to consider a simplified write-only device. For the write-only analysis, all signals are received by the memory. It will make all of the timing demands. (See Figure 3)

After this is completed, an analysis of the corresponding read-only device is performed. (See Figure 4) The memory receives address and control signals. It will make demands on these signals. The Microprocessor receives the data. It will make setup and hold requirements on the data from the memory.

COMMON TIMING CONSTRUCTION

1. Copy the clock signal from the microprocessor data sheet. This signal is fixed by the microprocessor and does not change for a given microprocessor.

2. Check the circuit diagram and the memory data sheet to see if the encoded processor status signals (FC(2:0)) are needed to separate the User and System memory. If they are not, you may choose to draw them on the diagram or leave them off. The same holds true for SIZ(1:0). Draw them as necessary. Include the address and address strobe signals also as these signals stay the same for read and write timing. Refer to MC68332 User's Manual Figures A-4 and A-5 for external chip select generation and Figure A-11 for internal chip select generation. Also include any other signals that stay the same for both read and write signals as this will reduce your overall effort.

3. Fill in the timing interrelationships between the signals. The figure used is a copy of the MC68332 write timing data sheet (MC68332 User's Manual, Figure A-5) with the wait cycles included between S2 and S3. Use upper case T's for all microprocessor parameters. (See Figure 6). This will allow you to distinguish between timing required for the microprocessor and that required for the memory (which will use lower case t's). Make a copy of this as this is the same for the read timing.

4. The sheet as constructed will be the skeleton for both the read and write timings. Make two copies of it: one for the read timings and one for the write timings. A suggestion is that you don't be cheap and try to use the original as one of the two copies. In the event of a mistake or a timing violation that requires a redesign, it is much easier to change that original diagram than it will be to change that diagram with a partial read or write timing diagram contained thereon.

1. Now add DS', CS', R/W' and DATA(15:0) signals from the MC68332 write timing and chip select diagrams. If the chip selects are externally generated make sure you have included all signals that are needed to generate them. Also include DSACK0' and DSACK1' if generating Chip Select externally. Fill in the timing interrelationships between the signals. (see Figure 7)

2. Now draw the signals received by the memory delayed by the appropriate amount (which are all the signals for a write to memory). The address lines and other unidirectional lines at the memory/peripheral as A0-A23, AS', DS', FC[0:3], SIZ[0:1] at the microprocessor delayed by T_A. This is true since most have the same type of buffers. Do the same for CS' and T_C; WE' and T_R; and DAT(15:0) and T_D. The time delays apply to both the start of the signal and the end of the signal. Use a "rubber ruler". (See Figure 8).

3. Determine when the Chip Select is asserted. If using the internally generated Chip Select the determine whether you are going to assert the chip select based on the address strobe or based on the data strobe (STRB in CSORxx). This will determine if the Chip Select becomes valid after S1 asserted or after S3 asserted. If using an externally generated Chip Select then it will be necessary to determine the last signal to become valid into your Chip Select logic and first signal to become invalid . Then you can use a general Tc delay from those signals. For the MC68332 using internally generated Chip Selects and NO buffer and looking at Figure A-5 in the MC68332 User's Manual it can be seen that t_SNRN (17) goes from Chip Select invalid to R/W' invalid. Since the minimum value is 15ns, Chip Select becomes invalid first. However with buffers included you must be able to guarantee that the maximum Chip Select buffer delay (Tc) is less than the minimum buffer delay for R/W' plus 15ns. If this can't be guaranteed, then you must write equations for each terminating first. Looking at the KM62256 timing waveforms and the footnotes, the write is not started until the last of Chip Select and Write Enable becomes valid and end whenever the first of those signals becomes invalid. Make sure you read ALL the footnotes with any timing diagram as they many time give you the critical information you need. Since the data bus on the Memory Chip as well as on the Microprocessor is bidirectional, it will be necessary to determine that the memory is off the data bus before the microprocessor gets on the data bus. This will entail considering a read followed by a write of the memory chip. The controlling signal determines when the data on the data bus of the memory chip is enabled or not. For the KM62256, the write enable always tells when the data out goes to high impedance. The signal which becomes invalid first determines when the data must be there from the microprocessor.

For the sample diagram, the only source of timing information to the KM62256 comes from one of the internal chip-selects, the address signals or the Write enable as provided by the microprocessor signals. Since buffers are included in the design it is necessary to show multiple locations for some of the signals since they either begin or end the write cycle. The notation is to add one or two additional characters at the end of the signal to indicate whether the beginning is started by Chip Select (C or 1 or 2) or by the Write Enable Signal (W). and ended by the Chip Select (C) or by the Write Enable (W).

4. Form Memory write data interrelationships from the Memory specification sheet. These parameters come from the write-timings section of the Memory timing data sheet (Page 58) (See Figure 9).

5. Since Memory receives all signals, it places all requirements on this system.

6. Now that you have your write-only timing diagram complete, you will use it to obtain an equation for each of the memory times shown in the write timing portion of the memory data sheet. For the KM67756C there are 9 terms, so you will need to write at least 9 equations (one for each term plus extras if you cannot determine in the memory is chip select controlled or WE' controlled on the write cycle).

7. To obtain the equations, pick one of the memory terms and write the sum of times from a fixed point on the clock (normally the beginning of the write cycle) to the end of the memory term you have chosen using only microprocessor and buffer delay terms (terms with a capital T). Set that equal to the sum of terms from the same beginning point on the clock to the beginning of the memory term chosen using only microprocessor and buffer delay terms (terms with a capital T) plus the memory term chosen (See Page 10).

8. Solve this equation for the memory term (on the left) since the signals are all received by the memory. Now convert the equation to an inequality by determining if the memory term specification from the data sheet is a maximum or a minimum. If it is a minimum, replace the equal sign by a since what the microprocessor supplies must be greater than the memory requirement. Now to make the right side of the equation a minimum put the subscript min on all terms with a plus sign and max on all terms with a minus sign except the clock terms. If the specification is a maximum, replace the equal sign by a since what the microprocessor supplies must be less than the memory requirement. Now to make the right side of the equation a maximum, put the subscript max on all terms with a plus sign and min on all terms with a minus sign except the clock terms.

9. Repeat this process for each of the remaining memory terms. Some terms only have meaning when the previous or following cycle is a read cycle. Because of this it is convenient to start with the signals in the state that would occur when the previous memory cycle was a read.

1. Start with the skeleton diagram previously constructed (see Figure 6).

2. Repeat steps 1 and 2 under the write only timing using the read timing figure omitting DATA(15:0). Note that the major difference from the Write figure is the change in the R/W' signal (as expected) and addition of 9A to DS' and CS' if you are heavily loaded.

3. Draw Memory read data on the bottom of the sheet. (See Figure 10)

4. Include Memory interrelationships to those signals as received by the Memory (e.g., Address, CS's . . .) Using lowercase ts. These parameters come from the read-timings section of the Memory timing data sheet.

5. Draw the microprocessor read data as memory read data delayed by T_D. The delay should be applied to both the leading and trailing edges of valid data.

6. Include the microprocessor interrelationships for its data with regard to the clock (setup and hold). (See Figure 11)

7. Memory receives CS's, A, OE', and WE' . It will make requirements on them.

8. Repeat steps 7 and 8 from the write only section above only for those terms that do not involve the data signal.

9. The microprocessor receives data and will make requirements (setup and hold) on it. Since you don't know which one of the Memory signals received will start and end the data, you must write one equation (for each of the microprocessor setup and hold) for each Memory signal. Repeat step 7 from the write only section above for those terms that involve the data signal.

10. Solve this equation for the data setup or data hold term (on the left) since the data signal is received by the microprocessor. Now convert the equation to an inequality by determining if the data setup or data hold term specification from the data sheet is a maximum or a minimum. If it is a minimum, replace the equal sign by a since what the microprocessor supplies must be greater than the memory requirement. If the specification is a maximum, replace the equal sign by a since what the microprocessor supplies must be less than the memory requirement.

11. Repeat this process for each of the memory terms. Some terms only have meaning when the previous or following cycle is a write cycle (Figure 11).

Write Timings (see Figure 9)

Frequency = 16.78 MHz (assume symmetrical waveform), thus Tcyc = 1/16.78 us or 59.6 ns. Memory is KM62256CL-100, Internal Chip Select used. Memory receives all signals and makes demands thereon.

twc - Write Cycle Time Note that no level is given for each end. Worst case is starting when signal is valid to last valid time.

(3+N)Tcyc + 8 + TA = 6 +TA+twc

(3+N)Tcyc + TCHAZn + TA = TCHAV+TA+twc

twc = (3+N)Tcyc + TCHAZn - TCHAV TAs can be cancelled in general as the delay at the beginning of a waveform should be the same as at the end.

twc(min) (3+N)Tcyc + TCHAZn(min) - TCHAV(max)

100 (3+N)*59.6 + 0 - 29 = 149.6 + 59.6*N Valid for N 0

tCW - Chip select to end of write. Since write terminating signal is unknown (Note 1) Write 2 eqns or find a microprocessor term that guarantees the termination. Note that 17 or TSNRN is the time from CS' negated to R/W' negated and is greater than 0, however the two signals have different delays. For R/W' to terminate write, the earliest that the chip select is deasserted must be greater than the latest that R/W' is deasserted or

TC(min) TR(max) + TSNRN(max). 0 15 Therefore only one case is needed if

TC(max) TR(min) + TSNRN(min) or TC(max) 15ns. If TC(max) 15ns both equations must be written.

Write terminated by CS' and canceling TCs. Any memory signal going across wait state gets N*Tcyc added

tCWC = 14A + N*Tcyc

tCWC =TSWAW + N*Tcyc

tCWC(min) TSWAW(min) + N*Tcyc

80 45 + 59.6N Valid for N 1

or

(N+1)Tcyc + 12 + TC = 9 + TC +tcw1 +Trf

tcw1 = (N+1)Tcyc + 12 + TC - 9 - TC - Trf

tcw1 = 59.6 + TCLSN - TCLSA - Trf + 59.6N

tCW(min) 59.6 + TCLSA(min) - TCLSA(max) -Trf(max) - 59.6 N

80 59.6 + 2 -25 -8 +59.6N

80 28.6 +59.6N Valid for N 1.

Note that there are two falls of CS' on the write timing. The correct one is determined by bit 10 in CSORBT.

The equation above is for bit 10 = 1 (Data strobe). If bit 10 = 0 the equation should be

tCW = 14 + N*Tcyc

tCW =TSWA + N*Tcyc

tCW(min) TSWA(min) + N*Tcyc

80 100 + 59.6N Valid for N 0

or

(N+2)Tcyc + 12 + TC = 9 + TC +tcw2 +Trf

tcw2 = (N+2)Tcyc + 12 + TC - 9 - TC - Trf

tcw2 = 119.26 + TCLSN - TCLSA - Trf + 59.6N

tCW(min) 119.26 + TCLSA(min) - TCLSA(max) -Trf(max) - 59.6 N

80 119.2 + 2 -25 -8 +59.6N

80 88.2 +59.6N Valid for N 0.

tAS - from address valid to WE' or CS1' low (whichever is later). Note that 21 or TRAAA is the time from R/W'' asserted to CS' asserted and is greater than 0. However CS' and R/W'' have different delays getting to memory (TC and TR) and these are not defined. Therefore write two equations or consider the equation TR + TRAAA(min) TC for CS' controlled.

WE' TRAAA(min) + TC(min) TR(max) - for WE' controlled (earliest CS' less than latest WE') (TR(max) 15ns)

20 +TR = 6 + TA + tas

TCHRL +TR = TCHAV + TA + tas

tAS = TCHRL + TR - TA - TCHAV

tAS(min) TCHRL(min) + TR(min) - TA(max) - TCHAV(max)

0 0 + 0 - TA(max) - 29 Won't work

CS1' TRAAA(min) + TC(min) TR(max) for CS' controlled (TR(max) 15ns)

6 + TA + tAS = 6 + 11 + TC

TCHAV + TA + tAS = TCHAV + TAVSA + TC

tAS = TAVSA + TC - TA

tAS(min) TAVSA(min) + TC(min) - TA(max)

0 15 + 0 - TA(max)

TA(max) 15ns and TR(max) 15ns

tAW From address valid to end of write. From tCW above end of write is controlled by CS' if TC(max) 15ns.

(2 ½ + N)*Tcyc + 12 + TC = 6 + TA + tAW + Trf

(2 ½ + N)*Tcyc + TCLSN + TC = TCHAV + TA + tAW - Trf

tAW = (2 ½ + N)*Tcyc + TCLSN + TC - TCHAV - TA - Trf

tAW(min) (2 ½ + N)*tcyc + TCLSN(min) + TC(min) - TCHAV(max) - TA(max) - Trf(max)

80 149 + 59.6*N + 2 + 0 - 29 - TA(max) - 8

TA(max) 37 + 59.6*N valid for N 0 if TA(max) 57

tWR From end of write to address valid, CS' controlled if TC(max) 15ns.

TCLSN +TC + tWR = ½ * Tcyc + TCHAZn+TA

TWR = TCHAZn + TA + ½ *Tcyc - TCLSN - TC

TWR min) TCHAZn(min) +TA(min) + 29.8 - TCLSN(max) -TC(max)

0 0 + 0 + 29.8 - 29 -TC(max) or TC(max)-TA(min) 0.8 ns

For WE' controlled

TR + tWR + TCHRH = TA + TCHAZn

tWR = TA + TCHAZn -TR - TCHRH

tWR(min) TA(min) + TCHAZn(min) -TR(max) -TCHRH(max)

0 0 + 0 -TR(max) - 29 CAN't BE

tDW Data Setup time (Data to end of write overlap)

TCHDO + TD + tDW = (1 ½ + N)*Tcyc + TCLSN + TC

tDW = (1 ½ + N) *Tcyc + TCLSN +TC -TCHDO -TD

tDW (min) 89.4 + TCLSN(min) + TC(min) + N*Tcyc - TCHDO(max) - TD(max)

50 89.4 + 2 + 0 + N*Tcyc - 29 - TD(max)

TD(max) 12.4 + N*Tcyc Valid for N0 if TD(max) 12.4 ns

tDH Data hold from end of write

TC + tDH = TSNDOI + TD

tDH = TSNDOI + TD - TC

tDH(min) = TSNDOI(min) + TD(min) - TC(max)

0 15 + 0 - TC(max)

TC(max) 15ns

tWHZ and tOW depend on read - write - read cycles and how soon the data gets on the bus and how soon off.

tWHZ gives the latest time the data is on the bus at the memory This must be less than the earliest time the micro puts data on the bus.

tWHZ TCLSN(max) + TC(max) + tWHZ(max) ½*Tcyc + TCHRL(min)+ TRADC(min)

2 + TC(max) + 30 29.8 + 0 +49

TC(max) 46.8 ns

tOW

TCHDH(max) + TD(max) + ½ * Tcyc TCLSN(min) + TC(min) +tOW(min)

28 + TD(max) + 29.8 2 + 0 + 5

Possible problem

Read Timings (see Figure 11)

Memory receives some signals and makes demands thereon.

tRC

Same as tWC

Processor receives data and makes setup and hold demands.

TDICL via tAA

6 + TA + tAA + TD + 27 = (2 ½ + N)*Tcyc

TCHAV + TA + tAA + TD + TDICL = (2 ½ + N)*Tcyc

TDICL = (2 ½ + N)*Tcyc - TCHAV - TA - tAA - TD

TDICL(min) 149 + N*Tcyc - TCHAV(max) -TA(max) - tAA(max) - TD(max)

5 149 - 29 - TA(max) -100 - TD(max) + 59.6N

TA(max) + TD(max) 15 + 59.6 N

TDICL via tCO Assumes WE' high

9 + TC + tCO + TD + 27 = (2 + N)*Tcyc

TCLSA + TC + tCO + TD + TDICL = (2 + N)*Tcyc

TDICL = (2 +N)*Tcyc - TCLSA - TC - tCO - TD

TDICL(min) 119.2 - TCLSA(max) - TC(max) - tCO(max) - TD(max) + 59.6 N

5 119 - 25 - TC(max) - 100 -TD(max) +59.6N

TC(max) + Td(max) 59.6N - 6 N 1

TDICL via tOE

18 + TE + tOE TD + 27 = (2 ½ + N)*Tcyc

TCHRH + TE + tOE + TD + TDICL = (2 ½ + N)*Tcyc

TDICL = 149 + N*Tcyc -TCHRH - TE - tOE - TD

TDICL(min) 149 - TCHRH(max) - TE(max) - tOE(max) - TD(max) + N*Tcyc

5 149 - 29 - TE(max) - 50 - TD(max) +N*Tcyc

TE(max) + TD(max) 70 + N*Tcyc

TSNDI via tOH

½ * Tcyc +8 + TA + tOH + TD = 12 + TC +29

½ Tcyc + TCHAZn + TA + tOH + TD = TCLSN + TC + TSNDI

TSNDI = ½ Tcyc + TCHAZn + TA + tOH + TD - TCLSN - TC

TSNDI(min) 29.8 + TCHAZn(min) + TA(min) + tOH(min) + TD(min) - TCLSN(max) - TC(max)

0 29.8 + 0 + 0 + 5 + 0 -29 - TC(max)

TC(max) 5.8nS

Bus conflict with adjacent write cycle: Memory read & microprocessor write

tOHZ and tHZ determine the latest that the memory is on the bus for a read and TRADC determines the earliest that the microprocessor puts anything on the bus.

tOHZ(max)

(TE + tOHZ + TD)max (55)min

TE(max) + tOHZ(max) + TD(max) TRADC(min)

TE(max) + 35 + TD(max) 40

TE(max) + TD(max) 5

tHZ(max)

(TC + 21 + tHZ + TD)max (55)min

TC(max) + TRAAA(max) + tHZ(max) + TD(max) TRADC(min)

TC(max) + 15 + 35 + TD(max) 40

Possible Problem - probably the minimum of these two terms (tOHZ and tHZ) will determine when the memory gets off the bus.

tLZ and tOLZ determine the earliest that memory will put anything on the bus and TCHDH determines the latest that the microprocessor puts anything on the bus.

tLZ(min)

(½ TCK + TCLSA + TC + tLZ + TD)min (54)max

29.8 + TCLSA(min) + TC(min) + tLZ(min) + TD(min) TCHDH(max)

29.8 + 2 + 0 + 10 + 0 28

41.8 28 OK

tOLZ(min)

(TCHRH + TE + tOLZ + TD)min (54)max

TCHRH(min) + TE(min) + tOLZ(min) + TD(min) TCHDH(max)

0 + 0 + 5 + 0 28

Possible Problem - probably the fact that CS' not asserted will prevent the memory from putting data on bus at this time but not until that determined by tLZ.

2708 2716 2732 2764 27128 27256

Pin Pin

No. Function Function Function No. Function Function Function

1 VPP VPP VPP

2 A12 A12 A12

1 A7 A7 A7 3 A7 A7 A7

2 A6 A6 A6 4 A6 A6 A6

3 A5 A5 A5 5 A5 A5 A5

4 A4 A4 A4 6 A4 A4 A4

5 A3 A3 A3 7 A3 A3 A3

6 A2 A2 A2 8 A2 A2 A2

7 A1 A1 A1 9 A1 A1 A1

8 A0(LSB) A0(LSB) A0(LSB) 10 A0(LSB) A0(LSB) A0(LSB)

9 O0(LSB) O0(LSB) O0(LSB) 11 O0(LSB) O0(LSB) O0(LSB)

10 O1 O1 O1 12 O1 O1 O1

11 O2 O2 O2 13 O2 O2 O2

12 VSS(GND) VSS(GND) VSS(GND) 14 VSS(GND) VSS(GND) VSS

13 O3 O3 O3 15 O3 O3 O3

14 O4 O4 O4 16 O4 O4 O4

15 O5 O5 O5 17 O5 O5 O5

16 O6 O6 O6 18 O6 O6 O6

17 O7 O7 O7 19 O7 O7 O7

18 PGM(GND) CE' CE 20 CE' CE' CE'

19 VDD(+12) A10 A10 21 A10 A10 A10

20 CS'/WE OE' OE'/VPP 22 OE' OE' OE'

21 VBB(-5) VPP(+5) A11 23 A11 A11 A11

22 A9 A9 A9 24 A9 A9 A9

23 A8 A8 A8 25 A8 A8 A8

24 VCC(+5) VCC(+5) VCC(+5) 26 NC A13 A13

27 (PGM)' (PGM)' A14

28 VCC(+5) VCC(+5) VCC(5)

CrossView Pro Information

Data Sheets

MC 144110 Digital-to-Analog Converter with Serial Interface

MC145051 11 Channel A/D Converter

74HC594 8-bit Shift Register with Output Registers

74HC166 Parallel-Load 8-bit Shift Register

Add-on Board Schematics

Connector P1 Connector P2

Pin Signal Mnemonic Pin Signal Mnemonics

1,2 GND 1,2 GND

3,4 VDD 3,4 VDD

5 DTROUT 5-20 D0-D15

6-24 A0-A18 21 RXD DI

25 EPROM-W 22 TXD DI

26 EPROM-VPP 23 MODB DI

27 +13-24V DI 24 XMT 232

28 VSTBY 25 CSBOOT'

29 +13-24V DI 26 RCV 232

30 T2CLK 27 R/W'

31-46 TP15-TP0 28 MODCK

47 MOSI 29 TSTME'/TSC

48 MISO 30 A23/CS10'

49 PCSO'/SS' 31 A22/CS9'

50 SCK 32 A21/CS8'

51 PCS2' 33 A20/CS7'

52 PCS1' 34 A19/CS6'

53 TXD 35 FC2/CS5'

54 PCS3' 36 FC1/CS4'

55 BKPT/DSCLK 37 FC0/CS3'

56 RXD 38 BGACK'/CS2'

57 RESET' 39 BG'/CS1'

58 FREEZE/QUOT 40 BR'/CS0'

59 IPIPE'/DSO 41-47 IRQ1'-IRQ7'

60 IFETCH'/DSI 48 BERR'

61,62 VDD 49-50 DSACK0',DSACK1'

63,64 GND 51 AVEC'

52 RMC'

53 DS'

54 AS'

55,56 SIZ0,SIZ1

57 11RESET'

58 CLKOUT

59 EXTAL

60 HALT'

61,62 VDD

63,64 GND

1. ¹ The following conventions apply to the timing parameters:

1. Upper case "T" parameters apply to the microprocessor or buffers.

2. Lower case "t" parameters apply to either the memory/peripheral.

3. Case in the subscript is not significant (e.g. T_r=T_R), but case of the "t" is significant (e.g. t_rT_r).